Spiral Metal Interconnection for Plasma Damage Mitigation

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Solution Overview

Problem

Plasma-induced damage in semiconductor devices occurs due to nonuniform charging density during plasma processes, leading to electrical stress and degradation of device characteristics.

Innovation Solution

The implementation of metal interconnections with a spiral structure, which generates an electric potential opposite to that caused by plasma-induced charging, mitigating damage by offsetting current flow during processes like contact etching and line etching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If plasma process is used to deposit or etch material layers, then fabrication capability is improved, but plasma-induced damage occurs causing device characteristic degradation

Engineering Contradiction:
Improvefabrication capabilityVSAvoiddevice characteristic
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary anti-action by forming a protective coating layer on the semiconductor device structure before plasma processing. This coating layer is specifically designed to counteract the harmful effects of plasma-induced charging by providing a barrier that prevents direct plasma interaction with sensitive device regions, thereby maintaining fabrication capability while protecting against reliability degradation

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent introduces an intermediary protective coating layer that acts as a mediator between the plasma environment and the semiconductor device. This coating layer absorbs or dissipates the plasma-induced charging effects, allowing the plasma process to proceed for fabrication while preventing direct damage to the device characteristics

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If nonuniform charging density occurs during plasma process, then plasma deposition or etching can be performed, but electrical stress and device degradation result

Engineering Contradiction:
Improveplasma process capabilityVSAvoidplasma-induced damage
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by providing non-uniform protective coating thickness or composition tailored to different regions of the semiconductor device. Areas more susceptible to plasma-induced charging receive enhanced protection, while less sensitive regions maintain standard processing access, thereby enabling plasma manufacturing while locally mitigating harmful effects

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent converts the harmful plasma-induced charging effect into a beneficial outcome by designing the protective coating to utilize the plasma energy in a controlled manner. The coating dissipates or redistributes the charging density to create more uniform electrical potential distribution, transforming the harmful nonuniform charging into a beneficial uniform field that protects device characteristics

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces plasma-induced damage, enhancing the reliability and performance of semiconductor devices by stabilizing electric potential and reducing leakage currents.

Implementation Method 1

metal interconnections with a spiral structure, which generates an electric potential opposite to that caused by plasma-induced charging

Methodology Applied
Scientific EffectElectric potential generation: Electromagnetic Induction

Data Source

PatentUS11699658B2Semiconductor device with metal interconnection
Publication Date: 2023.07.11 SK HYNIX INC
  • US11699658B2 patent drawing
  • US11699658B2 patent drawing
  • US11699658B2 patent drawing

AI summary

A semiconductor device includes: a substrate; a test transistor over the substrate; and multi-level metal interconnections formed over the substrate spaced apart from the test transistor, wherein at least one metal interconnection among the multi-level metal interconnections is a spiral metal interconnection.