Split-Band Sensor Interface Circuits for ToF Timing and Energy

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Solution Overview

Problem

Conventional front-end circuits for Time-of-Flight (ToF) systems are inadequate in accurately processing both timing and energy signals, leading to inefficiencies in power consumption and signal processing, particularly in multi-channel applications like PET scanners and lidar systems, where precise distance and energy measurements are required.

Innovation Solution

A front-end architecture that utilizes high-speed Time-to-Digital Converters (TDCs) for timing signals and low-speed Analog-to-Digital Converters (ADCs) for energy signals, employing a split-band approach to optimize power consumption and accuracy, allowing flexible channel selection based on application-specific requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a single high bandwidth channel is used to deliver both timing and amplitude information, then both timing and energy information can be obtained, but power consumption increases and very fast ADCs are required

Engineering Contradiction:
Improvetiming and energy measurement accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent divides the signal processing into two separate channels: a high-bandwidth timing channel that processes only timing information, and a lower-bandwidth energy channel that processes amplitude information. This segmentation allows each channel to be optimized independently, reducing the overall power consumption while maintaining measurement precision for both timing and energy parameters.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If a single high bandwidth channel is used to deliver both timing and amplitude information, then both timing and energy information can be obtained, but very fast ADCs are required

Engineering Contradiction:
Improvetiming and energy measurement accuracyVSAvoidADC speed requirement
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the signal processing into separate timing and energy channels, allowing the use of slower, less complex ADCs in the energy channel while maintaining high-speed processing in the timing channel. This reduces the overall device complexity and eliminates the requirement for very fast ADCs to handle both signals simultaneously.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary filtering stage that separates the timing and energy components of the signal before ADC conversion. This intermediary processing allows each ADC to be optimized for its specific function, reducing the speed requirements for the energy ADC while maintaining accurate timing measurement.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If discrete architectures and separate signal paths are used to separately detect timing and energy, then both parameters can be measured, but device complexity increases

Engineering Contradiction:
Improvetiming and energy measurement accuracyVSAvoidcircuit architecture complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the timing and energy signal processing into a unified front-end circuit architecture that shares common components such as amplifiers and filters. This merging approach maintains the separate detection paths for timing and energy while reducing overall device complexity through component sharing and integrated design.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP4428567A1Systems and methods for interfacing sensor devices
Publication Date: 2024.09.11 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • EP4428567A1 patent drawingFigure 1
  • EP4428567A1 patent drawingFigure 2
  • EP4428567A1 patent drawingFigure 3

AI summary

The present invention is directed to electrical circuits. In a specific embodiment, a first interface circuit is coupled to a first plurality of ports for processing signals at a first frequency range, and a second interface circuit is coupled to a second plurality of ports for processing signals at a second frequency range. The first interface circuit is coupled to a timing channel circuit. The second interface circuit is coupled to an energy channel circuit. There are other embodiments as well.