Split-Biased LO Buffer for Scalable Current and Isolation
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Solution Overview
Problem
In multi-band, multi-mode RF transceivers, traditional self-biased inverter type buffers face challenges with increased current consumption and reduced amplification capability under extreme process conditions and lower supply voltages, necessitating a solution for efficient LO signal transmission and scalable current consumption.
Innovation Solution
A buffer circuit design that individually biases first and second amplification circuits at different voltages, allowing for adjustable current consumption and improved isolation, enabling efficient LO signal transmission over longer lines and varying loads, and adaptable to different process-voltage-temperature (PVT) conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a self-biased inverter type buffer is used, then the buffer can provide amplification capability under normal conditions, but under extreme process conditions and lower supply voltage, the amplification capability is lost due to increased Vth and limited headroom
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the bias voltage of the buffer circuit based on detected process conditions. When extreme conditions are detected (such as increased Vth or limited headroom), the bias voltage is changed to compensate and maintain amplification capability. This resolves the contradiction by making the buffer adaptable to different process conditions while preserving its amplification function.
2Length of moving object
If a self-biased buffer is used to drive long LO lines, then signal transmission is achieved, but current consumption becomes higher than that of the DCO/VCO
Solution Approach 1:
The patent implements dynamics by making the buffer's current consumption adjustable rather than fixed. The bias voltage controlling circuit dynamically adjusts the buffer's operating point based on the required LO signal strength and line length. This allows the system to consume only the necessary current to drive the LO lines effectively, resolving the contradiction between driving capability and power consumption.
Solution Approach 2:
The patent changes the operating parameters of the buffer by adjusting its bias voltage based on detected process conditions and load requirements. This parameter adjustment optimizes the trade-off between driving capability (for long LO lines) and power consumption, ensuring the buffer consumes minimal current while still effectively driving the required line length.
3Length of moving object
If the buffer is designed for high signal strength output, then LO signal transmission over longer lines is enabled, but the buffer loses isolation from the VCO/DCO
Solution Approach 1:
The patent resolves this contradiction by dynamically adjusting the buffer's bias voltage based on detected process conditions. When high signal strength is needed for long LO lines, the bias is adjusted to provide sufficient drive capability. Simultaneously, the adaptive biasing maintains proper operating conditions that preserve isolation characteristics, preventing harmful feedback to the VCO/DCO while enabling extended LO distribution.
Data Source
AI summary
Disclosed are circuits, techniques and methods for buffering a high frequency signal for transmission over an integrated circuit. In one particular implementation, a plurality of amplification circuits are individually biased for amplifying a signal from a voltage controlled oscillator and/or digitally controlled oscillator to provide a local oscillator signal on a device.