Split-Counter Integrity Tree for Memory Security
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Solution Overview
Problem
Data processing systems face challenges in securely storing sensitive information in off-chip memory, which is vulnerable to attacks, as existing security measures like encryption and integrity checks incur performance costs and require additional calculations and memory accesses.
Innovation Solution
Implementing a counter integrity tree with split-counter nodes that efficiently verify data integrity by reducing the number of bits required for counters, allowing for a greater arity of tree nodes and fewer memory accesses, and dynamically adjusting minor counter sizes using a mirror tree to manage overflow and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If encryption and integrity checks are implemented for off-chip memory, then security against tampering is improved, but performance deteriorates due to additional calculations and memory accesses
Solution Approach 1:
The patent segments the counter into two parts: a major counter stored in secure on-chip memory and minor counters stored in vulnerable off-chip memory. This segmentation allows the system to maintain security for the critical authentication path while storing less critical data in faster, more accessible off-chip memory, thereby improving performance without compromising security.
Solution Approach 2:
The patent introduces an intermediary authentication mechanism where the major counter in secure memory mediates between the off-chip data and the authentication process. The major counter is used to authenticate minor counters, creating a hierarchical trust relationship that enables fast verification without requiring all security-critical data to be stored in slow secure memory.
2Reliability
If counter size is increased to prevent overflow, then reliability of integrity verification is improved, but memory space requirements increase and arity of tree nodes decreases
Solution Approach 1:
The counter is segmented into a major counter portion and minor counter portions. The major counter (stored securely) provides the primary overflow protection, while minor counters (stored in off-chip memory) can be smaller since they are authenticated by the major counter. This segmentation reduces the total memory space required while maintaining reliability through hierarchical authentication.
Solution Approach 2:
The patent changes the parameter distribution of counter bits: instead of having one large counter, it uses a smaller major counter combined with multiple smaller minor counters. The authentication code incorporates both the major counter and minor counters, creating a hierarchical structure where the major counter's security properties protect the entire counter system while using less total memory.
3Productivity
If more counters are stored in each node of the integrity tree, then the number of memory accesses is reduced, but the counter size per node must be reduced increasing overflow risk
Solution Approach 1:
Each node in the integrity tree stores a major counter and multiple minor counters. The major counter provides overflow resistance for the entire node, while minor counters can be smaller since they are authenticated by the major counter. This allows nodes to store more counters (improving memory access efficiency) without reducing the overflow resistance provided by the major counter.
Solution Approach 2:
The patent changes the counter size parameters at each node: instead of storing one large counter per node, it stores one medium-sized major counter and multiple smaller minor counters. The authentication mechanism combines these counters, allowing the system to increase the number of counters per node (reducing tree height and memory accesses) while maintaining overflow resistance through the major counter's security properties.
Data Source
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AI summary
A counter integrity tree for memory security includes at least one split-counter node specifying at least two counters each defined as a combination of a major count value shared between the at least two counters and a respective minor count value specified separately for each of the at least two counters. This increases the number of child nodes which can be provided per parent node of the tree, and hence reduces the number of tree levels that have to be traversed in a tree covering a given size of memory region. The minor counter size can be varied dynamically by allocating nodes in a mirror counter integrity tree for accommodating larger minor counters which do not fit in the corresponding node of the main counter integrity tree.