Split DAC Layout for High-Resolution Electro-Optical Displays

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Solution Overview

Problem

The integration of Digital-to-Analog (DA) conversion circuits in miniaturized and high-resolution electro-optical devices, such as OLED displays, poses challenges due to the complexity of integrating capacitance elements and switches, which affect the accuracy and efficiency of luminance control.

Innovation Solution

The electro-optical device incorporates a DA conversion circuit with a first and second DA conversion circuit, each converting different bit ranges into specific gradation voltages, and utilizes a coupling capacitance to manage voltage changes, with capacitance elements arranged along the data line to optimize space and reduce noise propagation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If a conventional DA conversion circuit with switches and capacitance elements is integrated into a miniaturized electro-optical device, then the device achieves high resolution and miniaturization, but the integration complexity increases and manufacturing precision becomes difficult to maintain

Engineering Contradiction:
Improvedevice sizeVSAvoidintegration complexity
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The DA conversion circuit is divided into multiple independent DA conversion circuits, each handling a portion of the bit data. This segmentation reduces the complexity of integrating all capacitance elements and switches into a single compact circuit, while still achieving the required resolution through coordinated operation of the divided circuits.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If more capacitance elements and switches are integrated for higher bit-depth conversion, then conversion accuracy improves, but the circuit area and manufacturing difficulty increase

Engineering Contradiction:
Improveconversion accuracyVSAvoidcircuit area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The conversion accuracy is maintained by dividing the bit-depth conversion task across multiple DA conversion circuits, each with fewer capacitance elements and switches. This segmentation allows high conversion accuracy to be achieved without requiring a single large circuit with all elements integrated.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of increasing circuit area by adding more elements in the same plane, the patent uses multiple separate circuits that can be arranged in different spatial dimensions or layers, effectively distributing the element count across multiple locations while maintaining compact overall device size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Volume of moving object

If capacitance elements are arranged in a compact configuration for miniaturization, then device size reduces, but noise propagation between elements increases

Engineering Contradiction:
Improvedevice sizeVSAvoidnoise propagation
Core Design Contradiction:
Volume of moving objectVSObject-generated harmful factors

Solution Approach 1:

By segmenting the DA conversion into multiple separate circuits, the noise sources in each circuit are isolated from each other. This segmentation reduces noise propagation between capacitance elements while still achieving miniaturization through the coordinated operation of the divided circuits.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12356813B2Electro-optical device having digital-to-analog conversion circuit and electronic apparatus
Publication Date: 2025.07.08 SEIKO EPSON CORP
  • US12356813B2 patent drawing
  • US12356813B2 patent drawing
  • US12356813B2 patent drawing

AI summary

An electro-optical device includes a DA conversion circuit to convert 10 bits of data into an analog voltage output to a data line. The DA conversion circuit includes a first DA conversion circuit to convert upper 5 bits into a voltage and outputs converted voltage to the data line, a second DA conversion circuit to convert lower 5 bits into a voltage and outputs converted voltage to a relay line, and a coupling capacitance including one end electrically coupled to the second DA conversion circuit and another end electrically coupled to the data line, wherein the first DA conversion circuit includes a capacitance element corresponding to the upper 5 bits and is arranged in the Y direction along the data line, and the second DA conversion circuit includes a capacitance element corresponding to the lower 5 bits and is arranged in the Y direction along the data line.