Split Data-Centric Heterogeneous Computing Architecture
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Solution Overview
Problem
Existing heterogeneous computing architectures face challenges in optimally integrating host processors and accelerators, leading to inefficient data processing and coordination issues, particularly in high-speed networking and storage applications, due to redundant data transmissions and lack of system-wide coordination among multiple accelerators.
Innovation Solution
A split control plane and data plane architecture is implemented, where the host processor handles IO stacks and the accelerator performs data processing, using a coordinator module to redirect DMA requests and employ a user-space RPC stub/proxy mechanism for efficient data transmission and authentication, allowing for secure and efficient operation across networks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the host processor handles all IO stack tasks and data processing, then system coordination is simplified, but data processing efficiency and bandwidth utilization deteriorate due to the host processor's limited throughput compared to specialized accelerators
Solution Approach 1:
The patent segments the computing system into distinct functional units: host processor for control plane operations (IO stack management, authentication), and accelerators for data plane operations (high-speed data processing). This segmentation allows each component to specialize in tasks matching its capabilities, improving overall productivity while managing complexity through clear functional boundaries.
Solution Approach 2:
The patent introduces an intermediary mechanism (RPC stub/proxy pair) that mediates communication between the host processor and accelerators. The stub on the accelerator side and proxy on the host side enable efficient task delegation and coordination without requiring complex direct integration, thus maintaining simplicity while enabling high-performance data processing.
2Speed
If accelerators are directly integrated with the host processor, then data transmission speed improves, but redundant data transmissions occur and bandwidth utilization deteriorates due to lack of coordinated data flow management
Solution Approach 1:
The patent implements preliminary action by having the host processor pre-process IO stack tasks, authentication, and data preparation before transferring data to accelerators. The coordinator module pre-coordinates data flow paths, ensuring that data is transmitted directly to the correct accelerator without redundant transmissions, thus improving bandwidth utilization while maintaining high transmission speeds.
3Productivity
If the accelerator handles IO stack tasks, then data processing throughput is maximized, but system security and coordination capability deteriorate because accelerators lack the capability for complex authentication and IO management
Solution Approach 1:
The patent applies local quality by assigning different functional qualities to different system components: the host processor is equipped with full IO stack capabilities, authentication mechanisms, and coordination logic, while accelerators are optimized purely for high-speed data processing. This differentiation ensures that security-critical functions remain on the secure host while throughput is maximized on the accelerator.
Solution Approach 2:
The RPC stub/proxy mechanism serves as an intermediary that enables the accelerator to offload data processing to the host processor for IO stack management and authentication. The stub submits tasks to the proxy, which handles security and coordination on the host, thus maintaining system security while allowing the accelerator to focus on high-throughput data processing.
4Productivity
If multiple accelerators operate independently, then processing capacity increases, but system-wide coordination deteriorates due to lack of centralized management for data flow and task distribution
Solution Approach 1:
The patent implements a universal coordinator module on the host processor that can manage multiple accelerators through a standardized interface. The RPC proxy serves as a universal mediator that can route tasks to any accelerator, distribute data flow appropriately, and coordinate interactions between multiple accelerators, thus enabling scalable processing capacity while managing coordination complexity through a unified management layer.
Data Source
AI summary
One example method includes transmitting, by an application running in a host CPU, a notification to an application in a coprocessor/accelerator indicating that inbound data generated by the application is ready, receiving, by the application in the coprocessor/accelerator, the notification and delegating, by the application in the coprocessor/accelerator, an IO command to the application running in the host CPU, forwarding, by the application running in the host CPU, the IO command to an OS of the host CPU, transmitting, by the OS of the host CPU, an IO request to an IO device, initiating, by the IO device, a P2PDMA to transmit data associated with the IO request to a memory of the coprocessor/accelerator, and processing, by the application in the coprocessor/accelerator, the data.