Split-Die Power Switch Packaging for Lower Voltage Drop
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Solution Overview
Problem
Existing integrated circuits face challenges in efficiently utilizing chip area due to the presence of power switches, which occupy significant space and can cause voltage drops, particularly in advanced device dies with high-density circuits.
Innovation Solution
Separating power switches into a different die from the power user circuits, allowing the power switches to be placed in a less advanced die, thereby saving chip area and reducing voltage drops by using wider and thicker metal lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If power switches are integrated on the same die as power user circuits, then circuit functionality is complete, but chip area is wasted and voltage drops increase
Solution Approach 1:
The patent divides the integrated circuit into separate dies: a first die containing power user circuits and a second die containing power switches. This segmentation allows each die to be optimized independently, saving chip area on the power user die while maintaining complete circuit functionality through inter-die connections.
Solution Approach 2:
The patent extracts the power switches from the power user circuit die and places them on a separate die. This extraction removes the area-consuming and voltage-drop-causing elements from the high-density circuit die, while the separated power switch die can use wider metal lines to reduce voltage drops.
2Reliability
If power switches are placed on advanced device dies with high-density circuits, then integration is maximized, but voltage drops increase due to limited metal line width
Solution Approach 1:
By segmenting the circuit into separate dies, the patent allows the power switch die to have relaxed area constraints, enabling the use of wider and thicker metal lines that reduce voltage drops and improve voltage stability.
Solution Approach 2:
The patent applies different design qualities to different parts: the power user circuit die maintains high-density integration, while the power switch die uses wider metal lines for low voltage drop, optimizing each region for its specific function.
3Productivity
If power switches occupy significant space on the same die, then circuit functionality is complete, but chip area utilization is inefficient
Solution Approach 1:
The patent segments the circuit into separate dies, allowing the power user circuit die to achieve high area utilization by excluding the area-consuming power switches, while the power switch die is dedicated solely to switching functions.
Solution Approach 2:
By extracting power switches to a separate die, the patent removes the area burden from the power user circuit die, improving chip area utilization efficiency while maintaining complete circuit functionality through the separated architecture.
Data Source
AI summary
A method includes forming a first device die and a second device die. The first device die includes a first integrated circuit, and a first bond pad at a first surface of the first device die. The first integrated circuit is electrically connected to the first bond pad. The second device die includes a power switch that includes a first source/drain region, a second source/drain region, a second bond pad electrically connecting to the first source/drain region, and a third bond pad electrically connecting to the second source/drain region. The method further includes bonding the first device die with the second device die to form a package, with the first bond pad bonding to the third bond pad, and bonding the package to a package component.