Split Dual Gate FET for Leakage Control

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Solution Overview

Problem

Current integrated circuits face challenges in reducing transistor leakage current while improving transistor drive current, as smaller device features lead to increased complexity and circuit density, but often result in trade-offs between these parameters.

Innovation Solution

A split dual gate field effect transistor design with two gate regions separated by an insulation region, allowing for independent gate biases to control threshold voltage, sub-threshold swing, and saturation drain current, which reduces leakage current significantly without altering gate oxide thickness or doping profile.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the transistor size is reduced to increase circuit density, then more devices can be fabricated on each wafer, but the transistor leakage current increases and drive current decreases

Engineering Contradiction:
Improvecircuit densityVSAvoidtransistor leakage current
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The gate is divided into two separate gate regions (first gate region and second gate region) that are spatially segmented and can be independently biased. This segmentation allows independent control of threshold voltage and drive current, enabling the transistor to achieve high circuit density while maintaining low leakage current through optimized gate voltage control.

Inventive Principle:
Principle #1Segmentation

2Power

If the threshold voltage is reduced to improve transistor drive current, then the drive current increases, but the transistor leakage current increases

Engineering Contradiction:
Improvetransistor drive currentVSAvoidtransistor leakage current
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The transistor employs dynamic and independent voltage control on two separate gate regions, allowing the threshold voltage to be adjusted in real-time based on operational requirements. By applying different voltages to the first and second gate regions, the device can optimize drive current while suppressing leakage current through adaptive threshold voltage modulation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the electrical parameters (voltage) applied to the two gate regions independently, allowing separate control of threshold voltage and drive current characteristics. By varying the gate voltages as independent parameters, the transistor achieves high drive current when needed while maintaining low leakage current during standby, resolving the trade-off between these two parameters.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces transistor leakage current by up to 75% and provides adjustable threshold voltage, enhancing device performance without compromising existing design parameters.

Implementation Method 1

The first gate region is capable of forming a first channel in the substrate region. The first channel is from the source region to the drain region. The second gate region is capable of forming a second channel in the substrate region. The second channel is from the source region to the drain region.

Methodology Applied
Scientific EffectElectric Field: Electric Field

Data Source

PatentUS8614487B2Split dual gate field effect transistor
Publication Date: 2013.12.24 SEMICON MFG INT (SHANGHAI) CORP
  • US8614487B2 patent drawing
  • US8614487B2 patent drawing
  • US8614487B2 patent drawing

AI summary

A semiconductor device with at least two gate regions. The device includes a substrate region including a surface, a source region in the substrate region, and a drain region in the substrate region. The drain region and the source region are separate from each other. Additionally, the device includes a first gate region on the surface, a second gate region on the surface, and an insulation region on the surface and between the first gate region and the second gate region. The first gate region and the second gate region are separated by the insulation region. The first gate region is capable of forming a first channel in the substrate region. The first channel is from the source region to the drain region. The second gate region is capable of forming a second channel in the substrate region. The second channel is from the source region to the drain region.