Split Floating Buried Layer Leakage Reduction via Doped Trench

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Solution Overview

Problem

Semiconductor devices with Floating Buried Layer (FBL) face challenges in reducing leakage current due to the overlap of depletion space charge layers with defect regions around the Scribe Street, which affects their breakdown voltage and reliability.

Innovation Solution

A novel structure is designed with a semiconductor substrate, epitaxial layers, a doped trench, and a S-JTE, where the epitaxial layers have opposite doping, and specific dimensions and doping concentrations are optimized to prevent the overlap of depletion layers with defect regions, featuring a split floating buried layer and a doped trench connected to the S-JTE.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the conventional split floating buried layer extends to scribe street, then the device structure is simplified and manufacturing is easier, but the depletion space charge layer overlaps with defect regions around Scribe Street causing increased reverse leakage current

Engineering Contradiction:
Improvefabrication simplicityVSAvoidreverse leakage current
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces a doped trench that divides and isolates the split floating buried layer into separate regions. This segmentation prevents the depletion space charge layer from extending continuously to the scribe street, thereby avoiding overlap with defect regions while maintaining the manufacturing advantages of the split floating buried layer structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The doped trench acts as an intermediary barrier between the split floating buried layer and the scribe street. By introducing this intermediate structure with opposite doping type, the patent blocks the extension of the depletion space charge layer toward the defective scribe street region, preventing harmful overlap while allowing the floating buried layer to maintain its electrical function.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of energy

If the doped trench is positioned closer to the split floating buried layer, then the on-resistance decreases, but the depletion layer may still overlap with defect regions

Engineering Contradiction:
Improveon-resistanceVSAvoidleakage current
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent optimizes the spacing parameters between the doped trench and the split floating buried layer, as well as the dimensions of the doped trench itself. By carefully controlling these geometric parameters, the design achieves the optimal balance between minimizing on-resistance (by keeping the trench close enough) and preventing depletion layer overlap with defect regions (by maintaining sufficient separation).

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This structure effectively reduces reverse leakage current, maintains low on-resistance, and enhances the reliability of FBL devices by avoiding the overlap of depletion layers with defect regions, resulting in improved high breakdown voltage performance.

Implementation Method 1

its depletion space charge layer shall be overlapped by defected region around Scribe Street. In that way, reverse leakage current takes place in SBFL device at reverse high voltage.

Methodology Applied
Scientific EffectDepletion layer: Electric Field

Implementation Method 2

requires rigorous depletion space charge balance between N-typed and P-typed drift regions

Methodology Applied
Scientific EffectSpace charge: Electric Field

Data Source

PatentUS9136325B2Device structure for reducing leakage current of semiconductor devices with floating buried layer
Publication Date: 2015.09.15 NO 24 RES INST OF CETC
  • US9136325B2 patent drawing
  • US9136325B2 patent drawing
  • US9136325B2 patent drawing

AI summary

A device structure is provided to reduce the leakage current of semiconductor devices with a floating buried layer (FBL), includes a substrate, a first epitaxial layer, a split floating buried layer, a second epitaxial layer, a doped trench, a protected device, a surface junction termination extension (S-JTE) and a scribe street. The device and the S-JTE are designed at the second epitaxial layer and the split floating buried layer at the joint of the first and second epitaxial layers. The doped trench is penetrated through the second epitaxial layer and connected to the split floating buried layer. The substrate, the first and second epitaxial layers feature the same typed doping which is opposite to that of split floating buried layer and doped trench.