Split-Gate Memory Control Gate Driver Disturb Reduction

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Solution Overview

Problem

In split-gate nonvolatile memory cells, high voltages applied to control gates during operations can lead to undesirable 'disturb' levels in memory cells not directly involved in the operation, limiting the size of memory sectors that can be programmed effectively.

Innovation Solution

A control gate driver is configured to use a select gate voltage as input to provide a control gate voltage, allowing for reduced disturb levels by isolating non-selected memory cells from high voltage exposure through selective decoding and voltage modulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If control gate drivers drive multiple rows of control gates to reduce layout area, then layout area is reduced, but high voltages are applied to non-selected control gates causing increased disturb levels

Engineering Contradiction:

Improvelayout areaVSAvoiddisturb levels

Core Design Contradiction:

Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The control gate driver is segmented into multiple independent driver circuits, each responsible for a specific row of control gates. This segmentation allows precise control where only the selected row receives high voltage while other rows remain at low voltage, thereby reducing disturb levels to non-selected memory cells while maintaining compact layout through integrated driver design

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

High voltage is applied locally only to the control gate row that is currently selected for operation, while other control gate rows maintain low voltage. This localized voltage application ensures that disturb effects are confined to the selected row only, solving the contradiction between compact layout and reduced disturb levels

Inventive Principle:

Principle #3Local quality

2Ease of operation

If high voltage is applied to control gates for program operations, then programming operation is enabled, but non-selected memory cells experience program disturb

Engineering Contradiction:

Improveprogramming operationVSAvoidprogram disturb

Core Design Contradiction:

Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The control gate driver circuit is pre-configured with selection logic that identifies the target row before applying high voltage. This preliminary selection ensures that high voltage is applied only to the intended control gate row, preventing program disturb in non-selected memory cells while enabling efficient programming operations

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The control gate driver acts as an intermediary between the control logic and the control gates, mediating the voltage application process. It receives selection signals and translates them into appropriate voltage levels for the selected row, while keeping other rows at safe voltage levels, thus preventing program disturb

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS9449703B1Systems and methods for driving a control gate with a select gate signal in a split-gate nonvolatile memory cell

Publication Date: 2016.09.20 NXP USA INC

AI summary

A nonvolatile memory includes a memory array having a plurality of memory cells, a select gate driver configured to provide a select gate voltage to a select gate of a first memory cell of the plurality of memory cells, and a control gate driver configured to use the select gate voltage to provide a control gate voltage to a control gate of a second memory cell of the plurality of memory cells.