Split Gate Flash Memory Contact Formation via Metal Gate Integration

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Solution Overview

Problem

The existing manufacturing process for split gate flash memory requires two separate photolithography processes to form contact plugs for polysilicon memory and select gates, increasing costs and resulting in high contact resistance due to the absence of silicide between the contact plugs and polysilicon gates.

Innovation Solution

The process involves replacing the polysilicon select and memory gates with metal-containing gates, allowing for simultaneous formation and reducing contact resistance, while maintaining the same manufacturing cost by integrating the replacement process with existing IO, logic, and SRAM devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If two separate photolithography processes are used to form contact plugs for memory gate and select gate, then contact plugs can be formed for both gates, but manufacturing cost increases

Engineering Contradiction:
Improvecontact plug formationVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent merges the formation of contact plugs for memory gate and select gate into a single photolithography process by using a common contact opening that extends through the gate dielectric to contact both gates simultaneously. This eliminates the need for two separate photolithography processes, reducing manufacturing cost while maintaining proper contact formation for both gates.

Inventive Principle:
Principle #5Merging (Combining)

2Ease of manufacture

If contact plugs are landed directly on polysilicon gates without silicide, then manufacturing process is simplified, but contact resistance becomes high

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidcontact resistance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces silicide as an intermediary material between the contact plug and the polysilicon gate. The silicide layer is formed on the polysilicon gate surface before contact plug deposition, providing low-resistance contact while maintaining the simplified single-opening manufacturing approach. This mediator resolves the contradiction by enabling both process simplicity and low contact resistance.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If polysilicon gates are replaced with metal-containing gates, then contact resistance is reduced and manufacturing cost is maintained, but additional processing steps are required

Engineering Contradiction:
Improvecontact resistanceVSAvoidgate structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the material parameter of the gate from polysilicon to metal-containing material. This material substitution reduces contact resistance due to the superior electrical conductivity of metal, while the metal gate can be integrated into existing CMOS fabrication processes, maintaining manufacturing cost efficiency despite the added processing complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10068773B2Contact formation for split gate flash memory
Publication Date: 2018.09.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10068773B2 patent drawing
  • US10068773B2 patent drawing
  • US10068773B2 patent drawing

AI summary

An integrated circuit structure includes a plurality of flash memory cells forming a memory array, wherein each of the plurality of flash memory cells includes a select gate and a memory gate. A select gate electrode includes a first portion including polysilicon, wherein the first portion forms select gates of a column of the memory array, and a second portion electrically connected to the first portion, wherein the second portion includes a metal. A memory gate electrode has a portion forming memory gates of the column of the memory array.