Split Gate Flash Memory Shared Source Drain Layout

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Solution Overview

Problem

Existing split gate flash memory technology is poor in performance due to issues such as over erasure and limited density, which restricts its application and efficiency in semiconductor manufacturing.

Innovation Solution

The proposed solution involves a memory structure with a substrate having separate storage areas, source and drain regions, and word line gates, where the storage units are arranged to share source regions and drain regions, allowing for reduced distance between memory units and efficient layout, thereby improving memory density and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If storage units are arranged with separate source and drain regions for each unit, then each storage unit can be independently controlled, but the distance between memory units increases and density decreases

Engineering Contradiction:
Improveindependent control of storage unitsVSAvoiddistance between memory units
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The patent merges source and drain regions by having adjacent storage units share common source and drain regions. Specifically, the first storage unit and second storage unit share a common source region and common drain region, reducing the number of discrete regions needed and decreasing the overall area occupied by memory units while maintaining independent control through separate control gates.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If more metal lines are used to lead out drain and source regions, then electrical connection is improved, but the metal layout size increases and exceeds one active area cycle

Engineering Contradiction:
Improveelectrical connectionVSAvoidmetal layout size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines multiple drain and source regions into fewer shared regions, which reduces the number of metal lines needed to connect them. By having storage units share common source and drain regions, the metal layout can efficiently connect to these shared regions without requiring separate lines for each individual storage unit, thus keeping the overall metal layout size within one active area cycle.

Inventive Principle:
Principle #5Merging (Combining)

3Quantity of substance

If storage units are placed closer together, then memory density increases, but manufacturing precision requirements increase

Engineering Contradiction:
Improvememory densityVSAvoidplacement precision of storage units
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent places storage units closer together by having them share common source and drain regions, which reduces the spacing between units. The shared regions act as common structures that simplify the manufacturing process, as fewer discrete regions need to be precisely formed and aligned, thereby reducing the overall manufacturing precision requirements despite the increased density.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11600627B2Memory and method for forming the same
Publication Date: 2023.03.07 SHANGHAI HUAHONG GRACE SEMICON MFG CORP
  • US11600627B2 patent drawing
  • US11600627B2 patent drawing
  • US11600627B2 patent drawing

AI summary

The present disclosure provides a memory and a method for forming the memory. The memory includes: a substrate including a first storage area and a second storage area; a source region disposed in the substrate between the first storage area and the second storage area; a first drain region and a second drain region in the substrate on both sides of the first storage area and the second storage area; a first storage structure disposed on the first storage area, including a first storage unit, a second storage unit, and a first word line gate; and a second storage structure disposed on the second storage area, including a third storage unit, a fourth storage unit, and a second word line gate. The memory can obtain an improved performance.