Split-Gate LDMOS Structure for Higher Breakdown Voltage

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The reliability of lateral diffused metal-oxide semiconductor (LDMOS) devices is compromised by hot carriers and high leakage current, particularly due to impact ionization at the corner of the gate structure and isolation structure, leading to breakdown under high drain to source voltage.

Innovation Solution

A novel design for the LDMOS device incorporating a split gate structure with a protruding portion to enhance the distribution of electric field, reducing impact ionization and increasing the drain to source breakdown voltage (Vbd).

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional gate structure is used in LDMOS devices, then the device can be easily integrated with low voltage circuitry, but hot carriers and high leakage current degrade reliability under high voltage conditions

Engineering Contradiction:
Improvedevice reliabilityVSAvoidhot carriers and leakage current
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The gate structure is divided into two separate gates: a first gate structure disposed over the semiconductor substrate and a second gate structure disposed on an isolation structure. This segmentation allows independent optimization of each gate's function, with the first gate controlling channel formation and the second gate managing electric field distribution at the isolation structure corner, thereby reducing hot carrier effects and improving reliability under high voltage conditions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The isolation structure serves as an intermediary element between the semiconductor substrate and the second gate structure. By positioning the second gate on the isolation structure rather than directly on the substrate, the patent creates a mediated configuration that enables better electric field control at the corner region, reducing impact ionization and leakage current while maintaining integration capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If the gate structure is simplified for easy integration, then manufacturing is easier, but the electric field distribution concentrates at the corner causing breakdown under high voltage

Engineering Contradiction:
Improveintegration easeVSAvoidbreakdown voltage
Core Design Contradiction:
Ease of manufactureVSStrength

Solution Approach 1:

The gate is segmented into two independent gate structures that can be formed using separate processing steps. The first gate structure is formed over the semiconductor substrate using standard integration techniques, while the second gate structure is formed on the isolation structure. This segmentation maintains ease of manufacture through modular fabrication while distributing the electric field to prevent corner concentration and breakdown.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second gate structure is positioned in a different spatial dimension - on top of the isolation structure rather than in the same plane as the first gate. This dimensional change allows the electric field to be controlled at the isolation structure corner without interfering with the primary gate operation, thereby increasing breakdown voltage while maintaining compatibility with standard integration processes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Device complexity

If a single gate structure is used, then the device structure is simpler, but impact ionization at the corner of the gate and isolation structure reduces breakdown voltage

Engineering Contradiction:
Improvegate structure complexityVSAvoidbreakdown voltage
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The single gate structure is divided into two separate gates: the first gate structure over the semiconductor substrate and the second gate structure on the isolation structure. This segmentation adds complexity to the device architecture but directly addresses the impact ionization problem by enabling independent control of the electric field at the isolation structure corner, thereby improving breakdown voltage and reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The isolation structure acts as an intermediary platform for the second gate, allowing it to be positioned strategically at the corner region where impact ionization occurs. This intermediary configuration enables the second gate to control and distribute the electric field effectively, reducing impact ionization and improving breakdown voltage despite the increased structural complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The split gate structure effectively broadens the electric field distribution, enhancing the breakdown voltage and improving the operational reliability of LDMOS devices under high voltage conditions.

Implementation Method 1

enhance the distribution of electric field

Methodology Applied
Scientific EffectElectric field distribution: Electric Field

Implementation Method 2

impact ionization at the corner of the gate structure and isolation structure

Methodology Applied
Scientific EffectImpact ionization: Ionisation

Data Source

PatentUS20250311361A1Semiconductor device
Publication Date: 2025.10.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250311361A1 patent drawing
  • US20250311361A1 patent drawing
  • US20250311361A1 patent drawing

AI summary

A semiconductor device including a semiconductor substrate, an isolation structure, a first gate structure and a second gate structure is provided. The semiconductor substrate includes a source doped region and a drain doped region laterally spaced apart from the source doped region. The isolation structure is embedded in the semiconductor substrate, and the isolation structure is disposed between the source doped region and the drain doped region. The first gate structure is disposed over a region of the semiconductor substrate, and the region of the semiconductor substrate is between the isolation structure and the source doped region. The second gate structure is disposed on the isolation structure, wherein the second gate structure is laterally spaced apart from the first gate structure, and the second gate structure includes a main portion and at least one protruding portion extending from the main portion toward the drain doped region.