Split Gate Memory Cell Biasing for Data Retention
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Solution Overview
Problem
Split gate non-volatile memory cells face data retention issues due to electron leakage at high temperatures and extended life cycles, as charge leaks into the well through the oxide between storage elements and the well, especially in harsh environments like automobile engines.
Innovation Solution
Maintaining a positive bias on the control gates of memory cells even when unpowered, establishing an electric field that counters electron leakage through the bottom dielectric layer, thereby improving data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the memory device is unpowered, then power consumption is reduced, but electron leakage into the well increases causing data retention loss
Solution Approach 1:
The patent applies a preliminary action by establishing an electric field in advance through biased control gates before power is completely removed. This pre-established field creates a potential barrier that prevents electron leakage during the unpowered state, thereby maintaining data retention without requiring continuous power supply.
Solution Approach 2:
The patent implements preliminary anti-action by creating an opposing electric field through the biased control gates that counteracts the natural electron leakage tendency. This opposing field acts as a protective barrier against the harmful leakage current before it can compromise the stored charge, enabling reliable data retention during power-off periods.
2Quantity of substance
If the dielectric layer thickness is reduced to increase storage density, then more charge can be stored, but electron leakage through the oxide increases
Solution Approach 1:
The patent introduces an intermediary mechanism by using biased control gates that generate an electric field acting as a protective barrier between the stored charge and the well. This intermediary field prevents direct electron tunneling through the thin dielectric layer, allowing high storage density to be achieved without suffering from increased leakage that would normally result from reduced dielectric thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces electron leakage and enhances data retention in memory cells, even under high temperature and extended life cycle conditions, ensuring reliable operation in harsh environments.
Implementation Method 1
Maintaining a positive bias on the control gates of memory cells even when unpowered, establishing an electric field that counters electron leakage through the bottom dielectric layer
Data Source
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AI summary
A non-volatile memory (NVM) system (100) has a normal mode, a standby mode and an off mode that uses less power than the standby mode. The NVM system includes NVM peripheral circuitry (102, 106, 110), a controller (108), and an NVM array (104) that includes NVM cells (302, 304, 306, 308, 310, and 312) and. Each NVM cell includes a control gate. The controller is coupled to the NVM array, applies a voltage to the control gates and power to the peripheral circuitry during the standby mode, and applies an off-mode voltage to the control gates and removes power from the NVM peripheral circuitry during the off mode.