Split Gate Memory Cell Architecture for Hot-Electron Injection
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Solution Overview
Problem
Split gate memory cells, which use hot-electron injection for programming, occupy more semiconductor surface than conventional flash memory cells and require a complex architecture with multiple source lines for individual current control, limiting their efficiency and footprint optimization.
Innovation Solution
A memory cell architecture with a vertical selection gate and horizontal control and floating gates, where the selection transistor sections are connected to a common source plane and the floating-gate transistor sections are connected to bit lines, allowing for voltage control of the programming current through the selection voltage applied to the selection gates, eliminating the need for current sources and reducing the number of interconnection lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a common source plane is used for all memory cells in a word line, then the number of interconnection lines is reduced and footprint is minimized, but individual programming current control is lost
Solution Approach 1:
The patent replaces the conventional current source (electrical component) with a voltage-controlled system using the embedded vertical gate. By applying different voltages to the selection gate, the programming current is automatically controlled through the transistor's inherent voltage-current characteristics, eliminating the need for separate current sources while maintaining individual cell control capability
Solution Approach 2:
The embedded vertical gate serves multiple functions: it acts as the selection gate for enabling/disabling memory cells, serves as a control mechanism for programming current regulation, and functions as part of the transistor structure itself. This multi-functionality eliminates the need for separate current control components
2Ease of operation
If multiple source lines are used for individual current control, then programming current control is improved, but the memory array complexity and number of interconnection lines increases
Solution Approach 1:
The patent merges the selection gate function and the current control function into a single embedded vertical gate structure. This consolidation eliminates the need for separate current control circuits and multiple source lines, reducing memory array complexity while maintaining effective programming current control through voltage regulation on the unified gate structure
3Device complexity
If the selection transistor operates in non-saturated mode, then the circuit design is simplified, but hot-electron injection performance deteriorates
Solution Approach 1:
The patent implements implicit feedback through the voltage regulation mechanism on the embedded vertical gate. By carefully controlling the selection gate voltage, the system maintains the selection transistor in saturated mode, ensuring optimal hot-electron injection performance. The voltage control acts as a feedback mechanism that stabilizes the operating point for maximum programming efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This architecture reduces the semiconductor surface occupation, simplifies the memory array structure, and maintains efficient programming performance by ensuring the selection transistor operates in saturated mode for optimal hot-electron injection, while minimizing the complexity of source lines and interconnections.
Implementation Method 1
During hot-electron programming, the two transistor sections of the memory cell cooperate in order to inject electric charges into the floating gate. The selection transistor section has a conductive channel in which a current appears, which comprises high kinetic energy electrons, referred to as 'hot electrons'
Implementation Method 2
an injection zone appears where the high energy electrons are injected into the floating gate under the effect of a transverse electric field created by the voltage applied to the control gate
Implementation Method 3
The selection transistor section operates in saturated mode so that its conductive channel has a pinch zone in the vicinity of the injection zone. The concentration of the current in the pinch zone favors the appearance of high kinetic energy electrons
Data Source
AI summary
The present disclosure relates to a memory comprising at least one word line comprising a row of split gate memory cells each comprising a selection transistor section comprising a selection gate and a floating-gate transistor section comprising a floating gate and a control gate. According to the present disclosure, the memory comprises a source plane common to the memory cells of the word line, to collect programming currents passing through memory cells during their programming, and the selection transistor sections of the memory cells are connected to the source plane. A programming current control circuit is configured to control the programming current passing through the memory cells by acting on a selection voltage applied to a selection line.