Split Gate Memory Device Fabrication Using Segmented Gates
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Solution Overview
Problem
The fabrication of memory cells with embedded non-volatile memory devices is complex and expensive due to the use of multiple masks and processes, making it unsuitable for lower-end applications without compromising performance and size.
Innovation Solution
A memory device with a simplified process involving a substrate, source and drain regions, a channel region, a first gate structure with a flat top surface, a mask over the gate structure, and a second gate structure adjacent to the first gate structure, which reduces the number of masks and steps required in the fabrication process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional fabrication processes with multiple masks and steps are used, then memory cell performance and size are maintained, but manufacturing complexity and cost increase significantly
Solution Approach 1:
The gate structure is divided into two separate gate structures formed at different stages. The first gate structure is formed initially, then a mask is deposited over it, and the second gate structure is formed over the mask. This segmentation allows each gate to be formed with simpler processes rather than requiring complex single-step formation of both gates simultaneously.
Solution Approach 2:
The first gate structure is formed in advance before the second gate structure. The mask is deposited over the first gate structure before forming the second gate, serving as a preliminary preparation that simplifies subsequent processing steps and eliminates the need for more complex alignment and formation processes.
2Ease of manufacture
If simplified fabrication processes are used, then manufacturing cost decreases, but memory cell performance and size may be compromised
Solution Approach 1:
By segmenting the gate formation into two separate structures formed at different stages, each gate can be optimized independently for its specific function. This allows the memory cell to maintain proper electrical characteristics and performance while using simpler, more cost-effective fabrication processes for each individual gate formation step.
Solution Approach 2:
The preliminary formation of the first gate structure and mask deposition creates a stable foundation that guides subsequent processing. This preliminary action ensures proper alignment and structural integrity, maintaining memory cell performance while enabling the use of simpler, lower-cost fabrication processes for the second gate structure.
Data Source
AI summary
A memory device may include a substrate, a first gate structure, a mask and a second gate structure. The substrate may include a source region and a drain region at least partially arranged within the substrate, and a channel region arranged between the source region and the drain region. The first gate structure may be at least partially arranged over the channel region, and may include a top surface that may be substantially flat. The mask may be at least partially arranged over the top surface of the first gate structure. The second gate structure may be at least partially arranged over the mask and at least partially arranged adjacent to the first gate structure.