Split-Gate Memory Step Structure for Retention Control
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Solution Overview
Problem
The retention characteristics of split-gate memory cells employing the MONOS type are affected by the difference in distributions of hot electrons during writing and hot holes during erasing, leading to variations in threshold voltage, especially at higher temperatures, and are compromised by the reduced width of the memory gate, which increases off-leakage current.
Innovation Solution
A semiconductor device with a memory cell structure where a step is introduced between the select gate and memory gate, aligning the electron injection position away from the gap region and closer to the drain region, improving electron distribution alignment with hole distribution, thereby reducing electron injection into the gap region and maintaining injection efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the memory gate width is reduced to improve resolution, then manufacturing precision is improved, but off-leakage current increases
Solution Approach 1:
The patent applies local quality by creating a step structure at a specific location (the substrate surface between select gate and memory gate) rather than uniformly changing the entire structure. This localized structural modification allows the memory gate width to be reduced for better precision while the step structure compensates for the increased off-leakage current by controlling the electric field distribution in the critical region.
2Reliability
If a step structure is introduced to align electron injection, then information retention is improved, but device complexity increases
Solution Approach 1:
The patent introduces a step structure that creates a height difference (z-dimension) between the substrate surface regions beneath the select gate and memory gate. This dimensional change allows precise control of electron injection positioning without requiring additional lateral structures or complex multi-layer configurations, thereby improving information retention while minimizing increases in device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This structure enhances information retention characteristics by minimizing electron injection into the gap region, reducing variations in threshold voltage and improving data retention and write/erase endurance, while preventing the increase in off-leakage current.
Implementation Method 1
a silicon nitride film 52b of a charge-trapping film
Implementation Method 2
when setting a condition which generates a high electric field at a boundary region between the select MOS transistor and the memory MOS transistor, hot electrons are generated on a surface of a p-type well 3 in this region
Implementation Method 3
a step is introduced between the select gate and memory gate, aligning the electron injection position away from the gap region and closer to the drain region
Data Source
AI summary
A step is provided between a substrate surface of a select gate and a substrate surface of a memory gate. When the substrate surface of the select gate is lower than the substrate surface of the memory gate, electrons in a channel upon writing obliquely flow in the step portion. Even if the electrons obtain the energy required for passing a barrier during the oblique flow, the electron injection does not occur because electrons are away from the substrate surface. The injection can occur only on a drain region side from a position where the electrons reach the substrate surface. As a result, the injection of the electrons into a gap region is suppressed, so that the electron distribution comes close to the hole distribution. Therefore, variation in a threshold value upon information retention is suppressed, and information-retaining characteristics of a memory cell are improved.