Split-Gate Memory Insulating Film Trench for Metal Diffusion

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In the manufacturing of semiconductor devices with split-gate type flash memory, the use of high dielectric constant insulating films containing metals like hafnium can lead to metal diffusion during polishing, affecting the threshold of MISFETs and increasing junction leakage current, thereby reducing electrical reliability.

Innovation Solution

A method is introduced where a trench is formed between the control gate and memory gate electrodes with an insulating film different from the charge accumulation film, and this trench is filled with an insulating film to prevent metal diffusion during polishing, ensuring the electrical properties of MISFETs are maintained.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If CMP polishing is performed to expose control gate and memory gate electrodes, then the upper surfaces of the electrodes are exposed for subsequent processing, but metal in the charge accumulation film diffuses and adheres to the semiconductor substrate

Engineering Contradiction:
Improveexposure of gate electrode surfacesVSAvoidelectrical reliability of semiconductor device
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

An insulating film is introduced as an intermediary layer between the charge accumulation film containing metal and the semiconductor substrate. This insulating film prevents direct contact and diffusion paths, allowing CMP polishing to expose gate electrodes while blocking metal diffusion to the substrate, thereby resolving the contradiction between ease of operation and electrical reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If ion implantation is performed with metal present on the surface, then source and drain regions are formed, but metal diffuses into the semiconductor substrate increasing junction leakage current

Engineering Contradiction:
Improveformation of source and drain regionsVSAvoidjunction leakage current
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The insulating film serves as a protective intermediary during ion implantation processes, allowing source and drain region formation while preventing metal contamination and diffusion into the semiconductor substrate, thus maintaining low junction leakage current

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If metal diffuses into the gate insulating film of MISFET, then the threshold of MISFET varies, but this causes threshold variations that prevent desired electrical properties

Engineering Contradiction:
Improvestandard MISFET fabrication processVSAvoidthreshold voltage control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The insulating film acts as a diffusion barrier that prevents metal atoms from reaching the gate insulating film of MISFET during polishing and subsequent processing, thereby maintaining precise threshold voltage control and desired electrical properties

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of semiconductor devices by preventing metal diffusion and maintaining desired electrical properties, thus reducing threshold variations and junction leakage currents.

Implementation Method 1

embedding the inside of the trench with an insulating film different from the charge accumulation film

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

polishing so as to expose an upper surface of the control gate electrode and the memory gate electrode

Methodology Applied
Scientific EffectChemical mechanical polishing:

Data Source

PatentUS11563111B2Method of manufacturing semiconductor device having split-gate memory and MISFET
Publication Date: 2023.01.24 RENESAS ELECTRONICS CORP
  • US11563111B2 patent drawing
  • US11563111B2 patent drawing
  • US11563111B2 patent drawing

AI summary

A trench is formed by removing a portion of each of the charge accumulation film and the insulating film located between the control gate electrode and the memory gate electrode. The insulating film is formed in the trench so that the upper surface of each of the insulating film and the charge accumulation film is covered with the insulating film. When exposing the upper surface of the control gate electrode and the memory gate electrode, the upper surface of each of the insulating film and the charge accumulation film is not exposed.