Split-Gate Power MOS Trench Insulation for Leakage Control
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Solution Overview
Problem
The thickness of the insulation layer between the first and second gate conductor layers in split-gate power MOS devices is not accurately controlled during the back-etching process, leading to issues with voltage withstand and electric leakage.
Innovation Solution
A spin-coating process is used to form a second insulation layer on top of the first gate conductor layer, and a mask layer is applied to protect this layer during etching, ensuring the thickness is neither too thick nor too thin, thereby preventing voltage and leakage issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If back-etching process is used to form insulation layer between gate conductor layers, then manufacturing process is simplified, but thickness control precision deteriorates leading to voltage withstand and leakage issues
Solution Approach 1:
The patent applies preliminary action by forming a protective film on the first gate conductor layer before the back-etching process. This protective film serves as a pre-prepared thickness reference that prevents over-etching and ensures accurate insulation layer thickness. The film is formed in advance and used as a stopping criterion during etching, thereby solving the thickness control issue while maintaining process simplicity.
Solution Approach 2:
The protective film acts as an intermediary element between the etching process and the first gate conductor layer. It mediates the etching process by providing a visible thickness reference and protection layer that allows precise control of the insulation layer thickness without requiring complex real-time monitoring systems, thus bridging the gap between simple manufacturing and precise thickness control.
2Loss of energy
If insulation layer thickness is reduced to decrease device capacitance, then device performance is improved, but voltage withstand capability deteriorates
Solution Approach 1:
The patent applies parameter changes by precisely controlling the thickness of the insulation layer through the protective film method. This enables optimization of the insulation layer thickness to achieve the right balance between low capacitance and sufficient voltage withstand capability. The thickness parameter is carefully adjusted within a specific range to simultaneously improve device performance and maintain reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method ensures stable insulation layer thickness, reducing voltage withstand and electric leakage problems, and decreases device capacitance.
Implementation Method 1
performing a spin-coating process on a surface of the first gate conductor in the cavity to form a second insulation layer
Data Source
AI summary
Disclosed is a split-gate power MOS device and a manufacturing method thereof. The method comprises: forming a trench in an epitaxial layer on a substrate; forming a first insulation layer on a surface of the epitaxial layer and in the trench; filling a cavity with polycrystalline silicon, performing back-etching; performing spin-coating on the first gate conductor layer to form a second insulation layer; forming a mask on the second insulation layer, removing a portion of the first insulation layer, to expose an upper portion of the trench; forming a gate oxide layer on a sidewall of the upper portion of the trench and the surface of the epitaxial layer; and forming a second gate conductor layer in the upper portion of the trench. According to the present disclosure, voltage withstand and electric leakage between the first gate conductor layer and the second gate conductor layer are reduced.