Split-Gate Trench MOSFET Layout for Tight Cell Pitch Alignment
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in manufacturing power semiconductor devices, such as split-gate trench MOSFETs, lies in achieving a reduced cell pitch while maintaining alignment and doping balance, which is hindered by lithography and contact-to-trench alignment issues, leading to imbalances in threshold voltage and device performance.
Innovation Solution
The semiconductor power device incorporates split-gate trench regions with insulating spacer regions and plug regions to ensure accurate alignment and doping, forming a channel along the side of each trench and within the body region, allowing for improved reliability and reproducibility through precise etching and doping processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the cell pitch is reduced to increase device density, then the productivity and device density are improved, but the manufacturing precision and alignment tolerance deteriorate
Solution Approach 1:
The patent performs preliminary doping of the body region with p-type dopants before trench formation. This preliminary action ensures that the dopant distribution is established in advance, making the subsequent manufacturing process less sensitive to alignment variations when reducing cell pitch.
Solution Approach 2:
The split-gate structure with laterally offset gates creates self-aligned doping regions. The gate structure itself serves as the alignment reference for the doping process, eliminating the need for separate alignment steps and reducing sensitivity to lithography and contact-to-trench alignment tolerances.
2Productivity
If the contact-to-trench distance is reduced to decrease cell pitch, then the device density is improved, but the threshold voltage balance between adjacent cells deteriorates
Solution Approach 1:
The patent divides the gate structure into two separate laterally offset gates (first and second gates) positioned in different trenches. This segmentation allows each gate to independently control the doping distribution in its adjacent body region, ensuring balanced threshold voltages even when the overall cell pitch is reduced.
Solution Approach 2:
The patent introduces asymmetric positioning of the split gates relative to the shared contact region. The first gate is offset in one direction while the second gate is offset in the opposite direction, creating symmetric doping profiles that balance the threshold voltages across adjacent cells despite reduced spacing.
3Reliability
If the p-type dopant implantation is performed with tight alignment to maintain threshold voltage balance, then the threshold voltage uniformity is improved, but the manufacturing complexity and process difficulty increase
Solution Approach 1:
The split-gate structure serves as a self-aligning feature for the p-type dopant implantation process. The gates automatically define the doping regions through their physical presence and position, eliminating the need for separate alignment steps and reducing manufacturing complexity while maintaining threshold voltage balance.
Data Source
Figure 1
Figure 2~2(c)
Figure 2~2(e)
AI summary
A semiconductor power device having an active region, the active region of the device comprising at least two split-gate trench regions, wherein the two laterally adjacent split-gate trench regions are separated by a mesa region, and two or more contact regions (115) of a first conductivity type located in the mesa region. The contact regions (115) of a first conductivity type are in contact with the two adjacent split-gate trench regions so that, in use, a channel is formed along a side of each split-gate trench region. The device further comprises at least two insulating spacer regions (160) located over and aligned with the two or more contact regions of a first conductivity type, and a source contact (155) extending from an upper surface of the device within the mesa region and between the at least two insulating spacer regions.