Split-Gate MOSFET Trench Design for Void-Free Dielectric Isolation
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Solution Overview
Problem
Existing split-gate MOSFETs face challenges in maintaining high breakdown voltage and low on-resistance due to voids in the dielectric layer between conductors, which affect mechanical strength and electrical performance.
Innovation Solution
The manufacturing method involves forming a first trench with a greater inner diameter than a second trench, ensuring the dielectric layers cover the conductors without voids, and using a third dielectric layer to isolate them, thereby preventing void formation and enhancing the device's mechanical and electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a deep trench split gate is added to improve breakdown voltage and balance electric field, then the withstand voltage is improved, but the trench has a small critical dimension which causes voids in the dielectric layer
Solution Approach 1:
The gate structure is divided into two separate gates (first gate and second gate) positioned in different trenches. This segmentation allows each gate to be independently formed with optimal dimensions, avoiding the void formation issue while maintaining the electric field balancing function that improves breakdown voltage.
Solution Approach 2:
A third dielectric layer is introduced as an intermediary between the first conductor and the second conductor. This additional dielectric layer ensures complete coverage and isolation, preventing void formation and improving the reliability of the dielectric layer in the narrow trench structure.
2Reliability
If the trench critical dimension is reduced to achieve split-gate structure, then the electric field balancing is improved, but voids are generated in the dielectric layer affecting mechanical strength
Solution Approach 1:
By segmenting the gate into two separate structures in different trenches, the patent achieves electric field balancing without requiring an excessively small trench dimension. The first trench can be formed with sufficient width to avoid voids while still achieving the desired electric field distribution.
Solution Approach 2:
The patent transitions from a single deep trench structure to a multi-trench configuration. This dimensional change allows the dielectric layers to be formed with adequate thickness and coverage, preventing void formation and maintaining mechanical strength while achieving the split-gate electric field balancing effect.
3Volume of moving object
If a small critical dimension trench is used for split-gate structure, then the device size is reduced, but the risk of leakage increases due to voids in the dielectric layer
Solution Approach 1:
The third dielectric layer acts as an intermediary that ensures complete coverage and isolation between conductors. This additional dielectric layer eliminates leakage paths that would otherwise exist due to voids in the original dielectric layer, while maintaining the compact device size achieved through the split-gate configuration.
Solution Approach 2:
The patent applies multiple dielectric layers (first dielectric layer, second dielectric layer, and third dielectric layer) as a preventive measure before leakage can occur. This multi-layer approach cushions against potential leakage paths, ensuring reliable isolation between conductors even in the small-critical-dimension trench structure.
Data Source
AI summary
Disclosed is a split-gate MOSFET and a manufacturing method, including: forming a first trench in a semiconductor layer; forming a second trench communicated with the first trench by using the first trench; forming a first dielectric layer in the second trench, a second dielectric layer in the first trench; forming a first conductor, located in the second trench, isolated from the semiconductor layer by the first dielectric layer; forming a third dielectric layer covering the first conductor; forming a second conductor, located in the first trench, isolated from the semiconductor layer by the second dielectric layer, the first conductor being isolated from the second conductor by the third dielectric layer; forming a body region adjacent to the first trench, the first trench has an inner diameter greater than that of the second trench. Thus, process window is expanded and beneficial to forming the third dielectric layer.