Split-Gate HV NMOS Structure for Hot Carrier and Switch Loss Control

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Solution Overview

Problem

High voltage N-type metal oxide semiconductor transistors face challenges with hot carrier effects, reliability issues due to high-frequency switch losses, and limited design flexibility for oxide layer thickness to balance breakdown voltage and conduction resistance.

Innovation Solution

The semiconductor device configuration includes a substrate with well and body regions of opposite doping types, isolation structures like LOCOS and STI, and a gate structure with adjacent gate regions of different doping types. This configuration reduces drain-gate capacitance, minimizes hot carrier effects, and enhances reliability by optimizing switch losses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the oxide layer thickness is increased to reduce hot carrier effects, then reliability improves, but breakdown voltage decreases and conduction resistance increases

Engineering Contradiction:
ImprovereliabilityVSAvoidbreakdown voltage
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The gate structure is segmented into two distinct gate regions: a first gate region with a first oxide layer and a second gate region with a second oxide layer of greater thickness. This segmentation allows each region to be optimized for different functions - the thinner first oxide layer maintains high breakdown voltage and low conduction resistance, while the thicker second oxide layer reduces hot carrier effects and improves reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different oxide layer thicknesses are applied to different spatial regions of the gate structure. The first gate region receives a thinner oxide layer for optimal electrical performance, while the second gate region receives a thicker oxide layer for enhanced reliability and hot carrier protection. This local differentiation resolves the contradiction by allowing each region to have the quality it needs.

Inventive Principle:
Principle #3Local quality

2Reliability

If the oxide layer thickness is increased to minimize hot carrier effects, then reliability improves, but switch losses increase

Engineering Contradiction:
ImprovereliabilityVSAvoidswitch losses
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The gate structure is segmented into two distinct gate regions: a first gate region with a first oxide layer and a second gate region with a second oxide layer of greater thickness. This segmentation allows each region to be optimized for different functions - the thinner first oxide layer maintains high breakdown voltage and low conduction resistance, while the thicker second oxide layer reduces hot carrier effects and improves reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different oxide layer thicknesses are applied to different spatial regions of the gate structure. The first gate region receives a thinner oxide layer for optimal electrical performance, while the second gate region receives a thicker oxide layer for enhanced reliability and hot carrier protection. This local differentiation resolves the contradiction by allowing each region to have the quality it needs.

Inventive Principle:
Principle #3Local quality

3Reliability

If a single thick oxide layer is used to improve reliability, then hot carrier effects are reduced, but design flexibility is limited

Engineering Contradiction:
ImprovereliabilityVSAvoiddesign flexibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The gate structure is segmented into two distinct gate regions: a first gate region with a first oxide layer and a second gate region with a second oxide layer of greater thickness. This segmentation allows each region to be optimized for different functions - the thinner first oxide layer maintains high breakdown voltage and low conduction resistance, while the thicker second oxide layer reduces hot carrier effects and improves reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different oxide layer thicknesses are applied to different spatial regions of the gate structure. The first gate region receives a thinner oxide layer for optimal electrical performance, while the second gate region receives a thicker oxide layer for enhanced reliability and hot carrier protection. This local differentiation resolves the contradiction by allowing each region to have the quality it needs.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250040230A1Semiconductor device and manufacturing method of semiconductor device
Publication Date: 2025.01.30 SILERGY SEMICON TECH (HANGZHOU) CO LTD
  • US20250040230A1 patent drawing
  • US20250040230A1 patent drawing
  • US20250040230A1 patent drawing

AI summary

A semiconductor device can include: a substrate; a well region located in the substrate and having a first doping type; a body region located in the substrate and having a second doping type that is opposite to the first doping type; a source region located in the body region and having the first doping type; a drain region located in the well region and having the first doping type; an isolation structure located on the substrate and between the drain region and the source region; and a gate structure located on the isolation structure and including a first gate region and a second gate region, where the first gate region is of the first doping type, and the second gate region is of the second doping type.