Split Gate NVM Re-entrant Spacers for Programming Efficiency

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Solution Overview

Problem

Conventional split-gate non-volatile memory (NVM) cells suffer from inefficient programming due to increased electric fields at the wordline corner, leading to reduced hot electron injection and programming efficiency.

Innovation Solution

The formation of dielectric re-entrant spacers in the intergate dielectric layer at the corners of the split gate NVM cells prevents the access gate from filling these re-entrants, thereby reducing unnecessary hot carrier injection and enhancing programming efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional split-gate NVM cell structure is used, then device simplicity is maintained, but programming efficiency deteriorates due to increased electric field at wordline corner causing unnecessary hot carrier injection

Engineering Contradiction:
Improveprogramming efficiencyVSAvoidintergate dielectric structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating re-entrant corners in the intergate dielectric layer specifically at the wordline corner region. This localized structural modification concentrates the electric field away from the problematic corner area, reducing unnecessary hot carrier injection only where needed while maintaining the overall simplicity of the split-gate NVM cell structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The re-entrant corners are formed in the intergate dielectric layer before the access gate is deposited. This preliminary action pre-configures the electric field distribution to prevent excessive field concentration at the wordline corner, thereby preventing unnecessary hot carrier injection before the programming operation even begins.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If re-entrant corners are formed in intergate dielectric layer, then hot carrier injection is reduced, but manufacturing process complexity increases

Engineering Contradiction:
Improveprogramming efficiencyVSAvoidfabrication process
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent achieves re-entrant corners by modifying the deposition parameters of the intergate dielectric layer, specifically by controlling the angle and conditions of dielectric material deposition. This parameter change allows the formation of re-entrant corners using standard semiconductor fabrication techniques without requiring additional complex processing steps.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution improves programming efficiency by minimizing unnecessary hot carrier injection, leading to more effective electron injection into the floating gate, thus enhancing the overall performance of split-gate NVM cells.

Implementation Method 1

a conventional split-gate NVM cell may be subjected to an increased electric field at the wordline (WL) corner. The increased electric field causes unnecessary HCI to the WL.

Methodology Applied
Scientific EffectElectric field: Electric Field

Implementation Method 2

The charging and discharging of electrons may be achieved by hot carrier injection (HCI) or Fowler Nordheim (FN) tunneling.

Methodology Applied
Scientific EffectHot carrier injection:

Implementation Method 3

The charging and discharging of electrons may be achieved by hot carrier injection (HCI) or Fowler Nordheim (FN) tunneling.

Methodology Applied
Scientific EffectFowler Nordheim tunneling:

Data Source

PatentUS10347773B2Split gate non-volatile memory (NVM) with improved programming efficiency
Publication Date: 2019.07.09 GLOBALFOUNDRIES SINGAPORE PTE LTD
  • US10347773B2 patent drawing
  • US10347773B2 patent drawing
  • US10347773B2 patent drawing

AI summary

Device and method of forming a non-volatile memory (NVM) device are disclosed. The NVM device includes NVM cells disposed on a substrate in a device region. The NVM cell includes a floating gate (FG) with first and second FG sidewalls disposed on the substrate and an intergate dielectric layer disposed over the FG and substrate. Re-entrants are disposed at corners of the intergate dielectric which are filled by dielectric re-entrant spacers. An access gate (AG) with first and second AG sidewalls is disposed on the substrate adjacent to the FG such that the second AG sidewall is adjacent to a first FG sidewall and separated by the intergate dielectric layer and the re-entrant spacers prevent AG from filling the re-entrants. A first source/drain (S/D) region is disposed in the substrate adjacent to the first AG sidewall and a second S/D region is disposed in the substrate adjacent to the second FG sidewall.