Split-Gate Flash Programming Using Erase-Gate Pre-Charging
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Solution Overview
Problem
The transition from an erase operation to a program operation in split-gate non-volatile memory cells is time and power consuming.
Innovation Solution
A method involving switches to connect the erase gate line to control gate lines for pre-charging during the erase operation, followed by applying a program voltage to these lines, reducing the need to discharge to a reference potential and minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the erase gate line is disconnected from control gate lines after erase operation, then the reference potential can be applied to control gate lines for proper programming, but this requires discharging the erase gate line which consumes additional time and power
Solution Approach 1:
The patent applies preliminary action by maintaining the erase gate line in a charged state during the transition from erase to program operations. Instead of discharging and re-charging the erase gate line, the positive charge is preserved and utilized for both erase and subsequent program operations, eliminating the discharge step and reducing transition time
Solution Approach 2:
The erase gate line serves multiple functions: it performs the erase operation when charged to a first voltage, and then continues to serve as a voltage source for the program operation by maintaining its charge and connecting to control gate lines. This multi-functionality eliminates the need for separate discharge and recharge cycles, reducing both time and power consumption
2Reliability
If the erase gate line is discharged to reference potential between erase and program operations, then control gate lines can be properly programmed, but this discharge and subsequent re-charging process consumes additional power
Solution Approach 1:
The patent recovers the energy stored in the erase gate line by maintaining its charge instead of discharging it. The positive charge that would otherwise be discarded is preserved and reused for the program operation, significantly reducing power consumption during the transition between operations
Solution Approach 2:
The erase gate line serves itself by providing the voltage needed for both erase and program operations. By maintaining its charged state and connecting to control gate lines during programming, the erase gate line eliminates the need for separate power supply cycles, reducing overall system power consumption
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the time and power required for programming by utilizing charge stored on the erase gate lines to pre-charge control gate lines, enhancing performance and reducing energy consumption.
Implementation Method 1
performing a pre-program operation that includes electrically connecting the one of the erase gate lines to a pair of the control gate lines to use positive charge on the one of the erase gate lines from the erase operation to pre-charge the pair of the control gate lines
Implementation Method 2
Electrons will then flow along the channel region 18 from the drain region 16 toward the source region 14, with electrons becoming accelerated and heated whereby some of them are injected onto the floating gate 20 by hot-electron injection
Implementation Method 3
The split gate memory cell 10 is erased by placing a high positive voltage on the erase gate 26, and optionally a negative voltage on the control gate 22, to induce tunneling of electrons from the floating gate 20 to the erase gate 26
Data Source
AI summary
A method of programming a memory device comprising control gate lines, erase gate lines, select gate lines, source lines and bit lines connected to rows and columns of memory cells, the method comprising performing an erase operation that includes applying a first voltage to one of the erase gate lines, performing a pre-program operation that includes electrically connecting the one of the erase gate lines to a pair of the control gate lines to use positive charge on the one of the erase gate lines from the erase operation to pre-charge the pair of the control gate lines, and performing a program operation that includes applying a second voltage to the one of the erase gate lines and the pair of the control gate lines.