Split-Gate Memory Transistor Reference Stabilization

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Solution Overview

Problem

Conventional semiconductor memory devices face variations in reference current due to electron injection or removal from the floating gate, affecting the reliability and accuracy of data sensing.

Innovation Solution

A semiconductor memory device with a split-gate type memory cell transistor and a MIS (Metal Insulator Semiconductor) reference transistor without a floating-gate structure, using a single gate electrode to prevent threshold voltage variations and stabilize the reference current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a transistor with the same structure as the memory cell transistor (including floating gate) is used as the reference transistor, then the reference transistor can be easily manufactured with the same process, but the threshold voltage of the reference transistor varies over time due to electron injection or removal from the floating gate, causing reference current instability

Engineering Contradiction:
Improveease of manufactureVSAvoidreference current stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The invention extracts the floating gate structure from the reference transistor, retaining only the essential MIS transistor components (gate insulating film, gate electrode, source/drain regions). This removal of the floating gate eliminates the source of threshold voltage variation while preserving the transistor's basic functionality for generating reference current.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention applies different structural qualities to different transistors in the same device. The memory cell transistor retains the full split-gate structure with floating gate for data storage functionality, while the reference transistor uses a simplified MIS structure without floating gate for stable reference current generation. Each transistor is optimized locally for its specific function.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If a split-gate memory cell transistor with floating gate is used, then data can be stored and sensed, but the floating gate structure causes threshold voltage variations that affect the stability of the reference current used for sensing

Engineering Contradiction:
Improvedata storage capabilityVSAvoidreference current stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The invention segments the transistor population into two distinct groups with different structures: memory cell transistors with split-gate structure for data storage, and reference transistors with simple MIS structure for stable reference current. This segmentation allows each type to be optimized for its specific function without compromising the other.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If the reference transistor has the same structure as the memory cell transistor, then manufacturing precision can be maintained, but the reference current varies due to defects in insulating film and voltage peripherally applied affecting the floating gate

Engineering Contradiction:
Improvemanufacturing precisionVSAvoidsensing accuracy
Core Design Contradiction:
Manufacturing precisionVSMeasurement precision

Solution Approach 1:

The floating gate is extracted from the reference transistor structure, eliminating the vulnerable component that suffers from electron injection/removal due to insulating film defects and peripheral voltage effects. This extraction preserves manufacturing simplicity while eliminating the source of reference current variation that degrades sensing accuracy.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS7928491B2Semiconductor memory device having reference transistor and method of manufacturing the same
Publication Date: 2011.04.19 RENESAS ELECTRONICS CORP
  • US7928491B2 patent drawing
  • US7928491B2 patent drawing
  • US7928491B2 patent drawing

AI summary

A semiconductor memory device has: a substrate; a memory cell transistor of a split-gate type formed on the substrate; and a reference transistor formed on the substrate and used for generating a reference current that is used in sensing data stored in the memory cell transistor. The memory cell transistor has a floating gate and a control gate, while the reference transistor is a MIS (Metal Insulator Semiconductor) transistor having a single gate electrode.