Split-Layout Quadrature Oscillator for Lower Phase Noise
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Solution Overview
Problem
Quadrature oscillators at high frequencies face challenges with phase noise, efficiency, and layout issues, particularly in 6G communication systems, due to increased parasitics, mode instability, and complex chip layout.
Innovation Solution
A quadrature oscillator design with a split layout into two halves, using transmission lines to connect transistors and resonators, reducing parasitics and mode instability, and improving phase noise performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If parallel injection transistors are used in quadrature oscillators at high frequencies, then the oscillators can operate at the desired frequency, but the phase noise performance degrades due to wider current injection interval
Solution Approach 1:
The oscillator is divided into two separate oscillating units, each with its own resonator and cross-coupled transistors. The parallel injection transistors are distributed between these units, with each injection transistor connected to a different oscillating unit. This segmentation allows the current injection to be distributed in a way that reduces the wider current injection interval effect, thereby improving phase noise performance while maintaining high frequency operation.
2Stability of the object's composition
If parallel injection transistors are used to ensure quadrature oscillation, then the quadrature relation is maintained, but the device size and parasitics increase
Solution Approach 1:
The oscillator circuit is segmented into two independent oscillating units, each containing a resonator, cross-coupled transistors, and associated injection transistors. This segmentation allows for better spatial distribution of the parallel injection transistors, reducing their overlap and minimizing parasitic effects while maintaining the necessary device size for stable quadrature oscillation.
Solution Approach 2:
The two oscillating units are arranged in a spatial configuration that separates their respective components. The first oscillating unit and second oscillating unit are positioned such that their resonators and transistors are distributed across different regions of the circuit, effectively utilizing spatial dimensionality to reduce parasitic interactions and minimize total device footprint while maintaining quadrature stability.
3Area of stationary object
If the quadrature oscillator layout is compact to save chip area, then integration is improved, but parasitic coupling between components increases
Solution Approach 1:
The compact layout achieves area efficiency by segmenting the oscillator into two modular oscillating units that can be tightly integrated. Each unit contains its own resonator and transistor pairs, arranged in a compact configuration. The segmentation allows for systematic placement that minimizes parasitic coupling while maintaining small overall chip area.
Solution Approach 2:
The layout utilizes three-dimensional spatial arrangement by distributing components of the two oscillating units across different layers and regions of the chip. The resonators and transistors are positioned in a manner that exploits vertical and horizontal spacing to reduce parasitic coupling, achieving compact area utilization without sacrificing performance.
Data Source
AI summary
A quadrature oscillator according to the embodiments herein comprising two pairs of main transistors, two pairs of resonators and two pairs of injection transistors. The quadrature oscillator is split into two halves, which are separated in the chip layout. That is the two pairs of resonators are separated from each other, and the two pairs of the main transistors are separated from the resonator they coupled to such that the quadrature oscillator is separated into two spaced apart oscillator halves connected by transmission lines.