Split Logical Block Address Mapping for Volatile Memory Caching
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Solution Overview
Problem
Conventional memory subsystems face significant overhead and latency due to the need to maintain and load large logical-to-physical (L2P) tables, which map logical block addresses to physical block addresses, especially in systems with growing non-volatile storage sizes and limited volatile memory resources.
Innovation Solution
The proposed solution involves splitting a logical block address into portions, using a less granular L2P table that maps ranges of logical block addresses to physical blocks, allowing the table to be cached entirely in volatile memory, reducing the need for frequent swaps between volatile and non-volatile memory and minimizing address management overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional L2P table maps individual logical block addresses to physical block addresses with fine granularity, then address mapping precision is improved, but the table size becomes too large to fit in volatile memory, causing frequent swaps and increased latency
Solution Approach 1:
The patent segments the L2P table into a coarser-grained structure where entries map ranges of logical block addresses to physical blocks. This segmentation reduces the total number of table entries, allowing the entire table to fit in volatile memory and eliminating frequent swaps, thereby reducing latency while maintaining sufficient mapping precision for memory operations
2Speed
If the L2P table is made less granular to reduce table size and fit in volatile memory, then memory access speed is improved, but the ability to precisely track individual address mappings is reduced
Solution Approach 1:
The patent applies segmentation by organizing the L2P table with coarser granularity, where each entry represents a range of logical block addresses mapping to a physical block. This reduces the number of entries to fit in volatile memory, enabling faster access without requiring frequent swaps, thus improving memory access speed while the range-based mapping maintains sufficient precision for the intended memory operations
3Measurement precision
If a fine-grained L2P table is maintained in volatile memory, then address mapping accuracy is preserved, but volatile memory resources are exhausted, increasing system complexity
Solution Approach 1:
The patent segments the address mapping structure into coarser-grained entries that map address ranges to physical blocks. This reduces the total number of entries required in the L2P table, allowing it to fit entirely in volatile memory without exhausting memory resources. The simplified table structure reduces management complexity while maintaining accurate mapping for memory operations
Data Source
AI summary
The subject application related to referencing memory using portions of a split logical block address. A method includes receiving a memory operation including a logical block address (LBA). The method also includes splitting the LBA into a first portion and a second portion. The method further includes determining a physical block of a memory using a logical-to-physical (L2P) table to map the first portion of the LBA to the physical block. The physical block includes a plurality of physical block addresses (PBAs). The method further includes combining the second portion of the LBA and the physical block to reference a physical block address (PBA) of the physical block. The method further includes performing the memory operation at the PBA of the physical block.