Split Analog Neural Memory Arrays for Energy-Efficient Synapse Computing
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Solution Overview
Problem
Existing artificial neural networks face challenges in achieving high computational parallelism and energy efficiency due to the lack of adequate hardware technology, particularly in implementing non-volatile memory arrays as synapses, which are bulky and inefficient.
Innovation Solution
The implementation of non-volatile memory arrays as synapses in artificial neural networks, allowing for individual programming, erasing, and reading of memory cells without affecting others, and enabling continuous analog programming, thereby facilitating precise tuning of synapse weights and reducing the need for separate circuits and enhancing energy efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If non-volatile memory arrays are used as synapses in artificial neural networks, then energy efficiency and computational parallelism are improved, but device complexity increases
Solution Approach 1:
The patent merges the functions of synapses and memory storage into a single non-volatile memory array structure. The memory array simultaneously performs weight storage, multiplication, and accumulation operations that were traditionally separated into distinct circuit components. This integration eliminates the need for separate multiplication and addition logic circuits, thereby improving energy efficiency while managing device complexity through functional consolidation.
Solution Approach 2:
The non-volatile memory array is designed to serve multiple functions: it stores synapse weights, performs analog multiplication of inputs by weights, and accumulates results to produce neuron outputs. This multi-functionality allows a single component to replace what would traditionally require multiple specialized circuits, improving energy efficiency and reducing the overall system complexity despite the advanced functionality required.
2Device complexity
If non-volatile memory arrays are used as synapses, then separate multiplication and addition logic circuits are reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent replaces traditional digital logic circuits (multiplication and addition units) with an analog memory-based computation system. The non-volatile memory array uses analog voltage or current signals to represent weights and performs multiplication through conductance modulation and accumulation through parallel signal summation. This substitution eliminates the need for complex digital logic circuits while requiring precise control over memory cell characteristics during manufacturing.
Solution Approach 2:
The invention changes the operational parameters from digital logic levels to analog voltage or current levels in the non-volatile memory array. By programming the memory cells with specific analog weight values and operating them in analog mode, the system achieves multiplication and accumulation functions. This parameter change requires precise manufacturing control to ensure consistent analog characteristics across memory cells, hence increasing manufacturing precision requirements.
3Measurement precision
If individual programming and erasing of memory cells is enabled, then synapse weight tuning precision is improved, but operation time increases
Solution Approach 1:
The patent implements preliminary programming of synapse weights into the non-volatile memory array during manufacturing or pre-processing. Once programmed, the weights are stored non-volitally and can be read out rapidly for computation without requiring repeated programming operations. This preliminary action enables precise weight tuning to be performed once, after which the configured weights can be used repeatedly for fast inference operations, thus balancing programming time with operational speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables high computational parallelism and energy efficiency by utilizing non-volatile memory arrays as synapses, allowing for precise tuning of synapse weights and reducing the need for separate multiplication and addition logic circuits.
Implementation Method 1
Each of the plurality of memory cells is configured to store a weight value corresponding to a number of electrons on the floating gate
Data Source
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AI summary
Numerous embodiments are disclosed for splitting an array of non-volatile memory cells in an analog neural memory in a deep learning artificial neural network into multiple parts. Each part of the array interacts with certain circuitry dedicated to that part and with other circuitry that is shared with one or more other parts of the array.