Split Option ROM Architecture for POST Time Reduction

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Solution Overview

Problem

Existing information handling systems require a significant amount of time to initialize due to the execution of monolithic option read-only memories (ROMs), particularly storage option ROMs, which contribute to prolonged power-on self test (POST) times, affecting customer experience and factory throughput.

Innovation Solution

Implementing a split ROM architecture that separates the initialization process into an initiator ROM to start and a completer ROM to complete the initialization of storage devices, allowing other POST tasks to proceed concurrently, thereby reducing overall POST execution time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a monolithic option ROM is used for storage device initialization, then the initialization process is simple to implement, but the POST execution time is significantly prolonged

Engineering Contradiction:
ImproveROM architecture complexityVSAvoidPOST execution time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent divides the monolithic option ROM into two separate components: an initiator ROM that starts the initialization process and a completer ROM that completes it later. This segmentation allows the system to avoid waiting for the entire initialization process to complete before continuing with other POST tasks, thereby reducing overall POST execution time while maintaining implementation simplicity through modular design.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If the system waits for storage devices to spin-up during POST, then device detection accuracy is improved, but the overall boot time is significantly increased

Engineering Contradiction:
Improvedevice detection accuracyVSAvoidboot time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The initiator ROM performs preliminary actions by starting the storage device spin-up process and then immediately transfers control to the system BIOS, allowing other POST tasks to proceed concurrently. The completer ROM is executed later to complete the initialization and perform accurate device detection. This preliminary action approach ensures both accurate device detection and reduced boot time by overlapping operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent enables continuous useful action by allowing the system BIOS to continue executing other POST tasks while the storage devices are spinning up in the background. The initialization process is not blocked or paused, maintaining continuous progress on multiple fronts simultaneously, which reduces total boot time while ensuring accurate device detection when the completer ROM executes.

Inventive Principle:
Principle #20Continuity of useful action

3Reliability

If storage option ROM execution is performed sequentially, then initialization reliability is improved, but system productivity is reduced

Engineering Contradiction:
Improveinitialization reliabilityVSAvoidfactory throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By segmenting the option ROM into initiator and completer portions, the system maintains reliable initialization through structured two-phase execution while improving productivity. The initiator phase ensures proper startup sequence, and the completer phase completes initialization after other tasks proceed, enabling parallel execution that boosts factory throughput without sacrificing initialization reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces dynamic execution flow where the completer ROM execution timing is flexible and can occur after other POST tasks are completed. This dynamic approach allows the system to adapt execution timing to optimize both reliability and productivity, enabling faster boot times and improved factory throughput while maintaining proper initialization sequences when needed.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7519804B2Split read only memory architecture for storage option read only memories
Publication Date: 2009.04.14 DELL PROD LP
  • US7519804B2 patent drawing
  • US7519804B2 patent drawing
  • US7519804B2 patent drawing

AI summary

A method for reducing execution time for a power on self test (POST) of an information handling system which includes providing the information handling system with a split option ROM wherein the split option ROM including an initiator split option ROM and a completer split option ROM, executing the initiator split option ROM upon execution of the POST wherein the initiator split option ROM starts initialization of an option corresponding to the initiator split option ROM, executing the power on self test to initialize a remainder of the information handling system, and executing the completer split option ROM after initializing the remainder of the information handling system wherein the completer option ROM completes initialization of the option corresponding to the completer split option ROM. is disclosed.