Split Page 3D Memory Array With Segmented Selection Structures
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Solution Overview
Problem
Current 3D memory devices face challenges in achieving high array efficiency and improved on/off characteristics for NAND strings due to strict pitch requirements and space constraints in selection structure arrangements.
Innovation Solution
The implementation of active strip stacks with dual sets of selection structures and control circuitry that apply varying voltages to different pads based on the memory cells being read, allowing for efficient selection and operation of memory cells through strategically positioned string and ground select line voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If IDG (independent double gates) structure is used with one set of SSL gate structures and one horizontal ground select line, then array efficiency is improved, but current on/off characteristics become poor
Solution Approach 1:
The selection structure is divided into two separate segments: string select lines (SSL) positioned at one end of the stacks and ground select lines (GSL) positioned at the other end. This segmentation allows each select line type to be independently optimized for its specific function, resolving the contradiction between array efficiency and on/off characteristics by enabling separate control of selection and ground potential establishment.
Solution Approach 2:
The patent transitions from a single-plane selection structure to a three-dimensional arrangement where SSL and GSL are positioned at opposite ends of vertically extending stacks. This spatial dimensionality change enables more effective voltage distribution and improved current control while maintaining high array efficiency through relaxed pitch requirements.
2Reliability
If finger VG (vertical gates) structure is used with two sets of SSL gate structures and two horizontal ground select lines, then current on/off characteristics are improved, but array efficiency decreases
Solution Approach 1:
The patent extracts the ground select function from the SSL structures and implements it through separate GSL structures positioned at the opposite end of the stacks. This extraction eliminates the need for two sets of SSL structures, reducing device complexity and improving array efficiency while maintaining effective ground control for current on/off characteristics.
Solution Approach 2:
The SSL structures positioned at one end of the stacks serve a dual function: selecting the string and establishing ground potential. The GSL structures at the opposite end provide the ground select function. This multi-functional arrangement improves array efficiency by reducing the number of required structures while maintaining reliable current control.
3Ease of manufacture
If twisted selection structure arrangement is used with staggered adjacent selection structures, then pitch requirements on contacts are relaxed, but more space along the lengths of stacks is required
Solution Approach 1:
The patent utilizes the vertical dimension by positioning SSL and GSL at opposite ends of vertically extending stacks rather than staggering them horizontally. This three-dimensional arrangement achieves relaxed pitch requirements through proper voltage application to the split-page structure while minimizing the horizontal space required, effectively resolving the contradiction between ease of manufacture and area utilization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances array efficiency and current on/off characteristics by optimizing voltage application and selection structure placement, addressing the limitations of existing technologies.
Implementation Method 1
The control circuitry is responsive to receiving a first command to read a first set of the memory cells on the memory array, by applying a first set of read voltages to the first pad and the second pad, such that the first pad has a higher voltage than the second pad. The control circuitry is responsive to receiving a second command to read a second set of the memory cells on the memory array, by applying a second set of read voltages to the first pad and the second pad, such that the second pad has a higher voltage than the first pad.
Data Source
AI summary
A semiconductor device includes active strips. Active strip stack selection structures electrically couple to the active strip stacks at positions between the first and second ends, and select particular ones of the active strip stacks for operations. In one embodiment, different pads coupled to opposite pads have a higher voltage, depending on the memory cell selected for read. The same active strip stack selection structure can act as a pair of side gates for opposite sides of a first active strip stack, and as one side gate for each of the adjacent active strip stacks. Each active strip stack can have: a first structure from a first set acting as first and second side gates on a first side of word lines; and a second structure and a third structure from a second set respectively acting as third and fourth side gates on the second side of word lines.