Split Power Management for Memory Substrate Area Reduction

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Solution Overview

Problem

In memory devices, especially in mobile and vehicle applications, the limited substrate size restricts the integration of power management components, leading to increased area occupation and reduced functionality or storage capacity.

Innovation Solution

Integrating a portion of the power management component with the memory device and forming another portion on the substrate, utilizing active components on the memory device and passive components on the substrate, such as diodes and capacitors, to reduce the overall area occupied by power management components and enhance storage or functionality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If power management components are formed entirely on the substrate, then power management functionality is achieved, but substrate area occupation increases

Engineering Contradiction:
Improvesubstrate areaVSAvoidpower management functionality
Core Design Contradiction:
Area of stationary objectVSAdaptability or versatility

Solution Approach 1:

The power management component is divided into two portions: a first portion formed on the memory device and a second portion formed on the substrate. This segmentation allows the substrate area to be reduced while maintaining complete power management functionality through the combined operation of both portions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent combines the power management functionality across two different substrates - integrating part of the power management component with the memory device substrate and placing the remaining part on the system substrate. This merging approach distributes the area burden while preserving overall functionality.

Inventive Principle:
Principle #5Merging (Combining)

2Area of stationary object

If power management components are integrated with the memory device, then substrate area is reduced, but device complexity increases

Engineering Contradiction:
Improvesubstrate areaVSAvoidpower management structure
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

By segmenting the power management component into two portions located on different substrates, the patent reduces the area burden on each individual substrate while distributing the complexity across separate physical locations, making the overall system more manageable.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If more substrate area is allocated to power management components, then power management capability is enhanced, but memory storage capacity is reduced

Engineering Contradiction:
Improvepower management capabilityVSAvoidmemory storage capacity
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The segmentation of the power management component allows the memory device substrate to allocate less area to power management functions, thereby freeing up substrate area for additional memory cells and increasing storage capacity, while the second portion on the system substrate ensures power management capability is maintained.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11762443B2Power management for memory device
Publication Date: 2023.09.19 MICRON TECHNOLOGY INC
  • US11762443B2 patent drawing
  • US11762443B2 patent drawing
  • US11762443B2 patent drawing

AI summary

Methods, systems, and devices for power management of a memory device are described. An apparatus may include a substrate and an input/output (I/O) interface and memory device coupled with the substrate. The I/O interface may communicate with a host device and the memory device may store data associated with the host device. The apparatus may include a power management component for providing one or more supply voltages to the memory device. The power management component may receive input voltages associated with the substrate and provide the supply voltages to the memory device based on the input voltages. The power management component may include a first portion integrated with the memory device and a second portion coupled with the substrate. The first portion may include control circuitry for the power management component and the second portion may include passive components for the power management component.