Split-Precharge Capacitor DAC for Low-Noise Differential Output

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Solution Overview

Problem

Conventional digital-to-analog converters (DACs) face challenges in reducing operational overhead, circuitry noise, and switching noise due to the need for explicit generation and sampling of mid-scale voltages, which increases complexity and noise levels.

Innovation Solution

The implementation of a split-precharge capacitor DAC that precharges half of the output-generating capacitors to a reference voltage (Vref) and the other half to ground, allowing charge redistribution to achieve a uniform precharge voltage at Vref/2, thereby avoiding the need for explicit mid-scale voltage generation and reducing noise and complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If explicit mid-scale voltage generation and sampling is implemented, then DAC functionality is achieved, but circuitry noise and switching noise increase

Engineering Contradiction:
ImproveDAC output accuracyVSAvoidcircuitry noise and switching noise
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent extracts and eliminates the explicit mid-scale voltage generation and sampling circuitry from the DAC design. By removing these noise-generating components while maintaining the essential DAC functionality through alternative means, the invention reduces circuitry noise and switching noise without sacrificing output accuracy.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies preliminary precharging actions to capacitors during a precharge phase before the actual conversion operation. By precharging capacitors to appropriate voltage levels in advance, the system eliminates the need for explicit mid-scale voltage generation during the conversion phase, thereby reducing noise while maintaining functionality.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If explicit mid-scale voltage generation and sampling circuitry is added, then DAC functionality is improved, but device complexity increases

Engineering Contradiction:
ImproveDAC output accuracyVSAvoidcircuitry complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent removes the complex explicit mid-scale voltage generation and sampling circuitry from the DAC design. By extracting these unnecessary components and replacing them with simpler precharging mechanisms, the invention reduces device complexity while maintaining DAC output accuracy.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the mid-scale voltage generation function into the precharging operation of the capacitors. By combining these functions and eliminating separate circuitry, the invention simplifies the overall device structure while preserving the required functionality.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If conventional DAC operation is used, then basic functionality is maintained, but operational overhead and timing margin are insufficient

Engineering Contradiction:
Improveconversion speedVSAvoidoperational overhead
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements preliminary precharging operations during a dedicated precharge phase before the conversion phase. By performing capacitor precharging in advance, the system reduces operational overhead during the critical conversion phase and increases timing margin, thereby improving conversion speed and productivity.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a lower-noise, smaller-footprint DAC with increased timing margin, as it eliminates the need for additional circuitry and noise associated with mid-scale voltage sampling, leading to improved performance and efficiency.

Implementation Method 1

precharging respective sets of output-generating capacitors to different potentials and then floating the common output of the two sets of capacitors such that charge is redistributed through the common output to yield, across all the capacitors, a uniform precharge voltage

Methodology Applied
Scientific EffectCharge redistribution: Electrostatic Induction

Data Source

PatentUS11239855B2Low-noise differential-output capacitor DAC
Publication Date: 2022.02.01 CADENCE DESIGN SYST INC
  • US11239855B2 patent drawing
  • US11239855B2 patent drawing
  • US11239855B2 patent drawing

AI summary

A capacitor-based digital-to-analog-converter produces a level-shifted analog outputs by precharging respective sets of output-generating capacitors to different applied potentials and then floating a common output of the sets of capacitors such that charge is redistributed among the capacitors through the common output to yield, across all the capacitors, a uniform precharge voltage that falls between the different applied potentials.