Split Metallic Seal Rings for Die-to-Die Routing Protection
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Solution Overview
Problem
The integration of higher circuit densities and smaller form factors in semiconductor devices poses challenges in protecting against defects such as cracking, delamination, moisture ingress, and ion diffusion, particularly during the singulation process, while maintaining efficient die-to-die connectivity and communication.
Innovation Solution
The implementation of chip sealing structures that accommodate die-to-die routing through split metallic seal structures, sealed box structures, back side die-to-die routing using through silicon vias, and electromagnetic field communication, which provide protection against microcracking, delamination, and moisture ingress, while enabling efficient inter-die and intra-die connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If seal rings are formed to completely surround circuit areas to protect against cracking and delamination, then protection against defects is improved, but openings must be provided to allow electrical interconnect lines to connect adjacent dies, which compromises the sealing effectiveness
Solution Approach 1:
The seal ring is segmented into multiple sections with openings that allow electrical interconnect lines to pass through. This segmentation enables the seal ring to simultaneously provide protection against cracking and delamination while accommodating the necessary electrical connections between adjacent dies or circuit blocks.
Solution Approach 2:
The seal ring structure implements local quality by providing different characteristics in different regions: continuous sealing in areas requiring protection and openings in areas where electrical interconnection is needed. This allows the seal ring to fulfill multiple functions within a single structure.
2Productivity
If higher circuit densities are integrated into smaller spaces to meet market demand for portable devices, then device performance and features are improved, but the risk of defects such as cracking and delamination during singulation increases
Solution Approach 1:
The seal ring structure is formed at the wafer scale during the back-end-of-the-line build-up process, before singulation of dies from the wafer. This preliminary action provides protective sealing to high-density circuit areas before they are subjected to the mechanical stresses of dicing, preventing cracking and delamination.
Solution Approach 2:
The seal ring acts as a protective barrier that cushions high-density circuit areas against the mechanical stresses encountered during singulation. By providing this protective structure beforehand, the patent prevents defects that would otherwise occur during the dicing process.
3Reliability
If seal rings are formed from continuous filled trenches and vias in metallization layers, then protection against moisture ingress and noise is improved, but the manufacturing process complexity increases
Solution Approach 1:
The seal ring structure merges multiple functions into a single formation process: mechanical protection against cracking, chemical protection against moisture ingress, and electromagnetic shielding against noise. All these protective functions are achieved by forming continuous filled trenches and vias in the metallization layers during the standard back-end-of-the-line process.
Data Source
AI summary
Chip sealing designs to accommodate die-to-die communication are described. In an embodiment, a chip structure includes a split metallic seal structure including a lower metallic seal and an upper metallic seal with overlapping metallization layers, and a through seal interconnect navigating through the split metallic seal structure.