Split VCO Quantizer in Sigma-Delta Modulators for Simpler DAC Feedback
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Solution Overview
Problem
Conventional continuous time sigma delta modulators with VCO-based ADCs face limitations in achieving high signal-to-noise ratio (SNR) and low over-sampling ratio (OSR) due to the need for complex multi-level DACs and power-hungry feedback loops, leading to inefficiencies in digital-to-analog conversion.
Innovation Solution
A continuous time sigma delta modulator architecture with a split VCO-based quantizer, where the digital output lines are split into N bits for the DAC and M-N bits for a digital error correction filter, allowing for reduced DAC complexity and improved SNR through digital filtering, while maintaining a low over-sampling ratio and high analog bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a feedback loop with DAC is used to compensate for VCO non-linearity, then linearity is improved, but the DAC requires a prohibitive number of bits for long ring oscillators
Solution Approach 1:
The patent segments the M output phases from the ring oscillator into two groups: N phases are used for feedback to the DAC, while the remaining M-N phases are processed through digital filtering. This segmentation allows the DAC to operate with reduced bit depth (N bits) while maintaining linearity compensation, thereby resolving the contradiction between linearity improvement and DAC complexity reduction
Solution Approach 2:
The patent introduces digital error correction filtering as an intermediary between the ring oscillator output and the final digital output. This intermediary processes the M-N phases that are not fed back to the DAC, enabling the system to achieve high linearity with a simpler, lower-bit DAC by mediating the relationship between the oscillator phases and the feedback signal
2Measurement precision
If a ring oscillator with many output phases is used, then resolution limitation is compensated, but the feedback DAC requires more bits to handle all phases
Solution Approach 1:
The patent divides the M output phases into two segments: N phases are directed to the feedback DAC for linearity compensation, while the remaining M-N phases are processed through digital error correction filtering. This segmentation enables the system to utilize the resolution benefits of many oscillator phases without requiring the DAC to handle all M phases, thus maintaining high resolution while reducing DAC complexity
Solution Approach 2:
The patent applies partial action by using only N out of M phases for feedback to the DAC, where N is less than M. This partial utilization of the available phases allows the system to achieve sufficient linearity compensation and resolution without the excessive complexity of using all M phases in the feedback path, thereby optimizing the trade-off between measurement precision and device complexity
Data Source
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AI summary
A continuous time sigma delta modulator is disclosed. The modulator includes a loop filter, a multi-stage oscillator-based quantizer, an M-to-N splitter, a digital-to-analog converter (DAC), and a digital error correction filter. The multi-phase oscillator-based quantizer converts an output of the loop filter to an M-bit digital signal, and the splitter splits the M-bit digital signal to N bits and M-N bits. The N bits are sent to the DAC and M-N bits are sent to the digital error correction filter. The multi-phase oscillator-based quantizer includes a ring oscillator and an exclusive OR to capture phase differences of the multi-phase outputs of the ring oscillator. The N bits selected from the M bits may be evenly distributed over the M bits.