SPMI Bus Level Translator With One-Shot Leakage Control

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Solution Overview

Problem

Current level translators for SPMI buses face challenges with high leakage current and slow signal rise and fall times, which are not sufficient to meet the performance requirements of modern mobile devices.

Innovation Solution

A level translator design that incorporates one-shot circuits and switches to control current leakage by being ON only during signal rise times, reducing leakage and ensuring fast signal transitions, with a configuration suitable for SPMI protocol operations between 1.2V and 1.8V voltage domains.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If conventional level translators are used for SPMI bus, then voltage level translation is achieved, but leakage current is high and signal rise/fall times are slow

Engineering Contradiction:
Improveleakage currentVSAvoidsignal rise and fall times
Core Design Contradiction:
Loss of energyVSSpeed

Solution Approach 1:

The patent applies dynamic control by using one-shot circuits that generate time-limited enable signals to control the switches. The switches are dynamically turned on only during the brief period when signal transition is needed (during rise time), and automatically turned off afterward. This dynamic operation reduces leakage current while maintaining fast signal transitions, resolving the contradiction between low power consumption and fast switching speed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The one-shot circuits create periodic enable pulses that activate the switches only during necessary transition periods. This periodic action ensures that switches operate in short bursts during signal rise times rather than remaining continuously on, thereby reducing overall leakage current while preserving the ability to achieve fast signal transitions when needed.

Inventive Principle:
Principle #19Periodic action

2Speed

If switches are kept ON continuously to ensure fast signal transitions, then signal rise and fall times are reduced, but leakage current increases

Engineering Contradiction:
Improvesignal transition speedVSAvoidleakage current
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The switches are controlled dynamically through one-shot circuits that generate enable signals only during the brief periods when signal transitions occur. This dynamic switching strategy allows the circuit to achieve fast signal transitions when needed while minimizing the time switches remain conductive, thereby reducing leakage current and resolving the energy-speed tradeoff.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The one-shot circuits are configured to activate switches preliminarily and automatically at the precise moment when signal transition is detected, ensuring fast response without requiring continuous switch operation. This preliminary action ensures that switches are ready and activated exactly when needed for fast transitions, then automatically deactivated to minimize leakage.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3739461B1Level translator for SPMI bus
Publication Date: 2022.10.19 NXP BV
  • EP3739461B1 patent drawingFigure 1~2
  • EP3739461B1 patent drawingFigure 3
  • EP3739461B1 patent drawingFigure 4

AI summary

A bi-directional level translator (40) with fast rise and fall times and low current leakage is suitable for use with devices connected using a SPMI bus. The level translator (40) passes signals between first (VccA) and second (VccB) voltage domains that operate at different voltage levels. The level translator has a first terminal (42) that receives a first signal A from the first voltage domain and outputs a second signal B to the second voltage domain. A second terminal (44) receives the second signal B and outputs the first signal A. A first switch (S1) is located between the first voltage source (VccA) and the first terminal (42) and a second switch (S2) is located between the second voltage source (VccB) and the second terminal (44). The first and second switches (S1, S2) are operable to reduce current leakage of the level translator (40).