SPMI Bus Ownership Transfer Clock Ringing Suppression
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Solution Overview
Problem
In systems with multiple masters on a System Power Management Interface (SPMI) bus, bus ownership transfers can cause clock signal ringing, leading to interference and incorrect master priority calculations, resulting in bus contentions, especially on longer bus lengths exceeding 15 cm.
Innovation Solution
The original master holds the clock line at a logical low for a determined clock delay value based on conductor length to prevent ringing, allowing the new master to assume ownership only after the ringing has stopped, as specified in a configuration table.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If bus ownership is transferred between masters on the SPMI bus, then the new master can assume control and provide clock signal, but clock signal ringing occurs on the conductor causing interference and bus contentions
Solution Approach 1:
The original master performs a preliminary action by holding the clock line at logical low for a determined delay period before releasing it during bus ownership transfer. This preliminary holding action prevents the clock signal from ringing when the new master subsequently activates the clock line, thereby eliminating interference and bus contentions while maintaining the adaptability of bus ownership transfer.
2Length of stationary object
If the conductor length of the SPMI bus exceeds 15 cm, then the bus can accommodate longer connections, but clock signal ringing becomes more severe leading to incorrect master priority calculations
Solution Approach 1:
The system determines a clock delay value based on the conductor length from a configuration table, and the original master holds the clock line at logical low for this determined period before release. This preliminary holding action is specifically designed to counteract the increased ringing effect in longer conductors, ensuring that master priority calculations remain accurate even when the bus length exceeds 15 cm.
3Speed
If the original master releases the clock line immediately during bus ownership transfer, then the transfer is faster, but ringing occurs causing bus contentions
Solution Approach 1:
The original master performs a preliminary holding action on the clock line for a determined delay value before releasing it during bus ownership transfer. This brief holding period is sufficient to prevent ringing and ensure reliable bus operation, while the overall transfer process remains fast due to the concise duration of the delay period.
Solution Approach 2:
The system changes the temporal parameter of clock line control by introducing a determined delay value (based on conductor length from configuration table) that the original master holds the clock line at logical low. This parameter change optimizes the balance between transfer speed and reliability by precisely controlling the hold duration.
Data Source
AI summary
The systems and methods for bus ownership in a system power management interface (SPMI) bus may include two or more masters on the SPMI bus, and bus ownership may be passed between masters. The current owner of the bus is responsible for providing a clock signal on the clock line of the SPMI bus. To avoid problems caused by ringing of the clock signal being sent on a conductor that exceeds the SPMI specification, the original master (from whom bus ownership is being transferred) holds the clock line of the SPMI bus at a logical low for a clock delay value that is based on conductor length.


