Spread Spectrum Clock Generator Using Delay Line Modulation

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Solution Overview

Problem

High-performance microprocessor-based devices generate significant electromagnetic interference (EMI) emissions, which exceed regulatory limits, requiring costly suppression measures or extensive shielding, and existing spread spectrum clock signal generation methods are complex and prone to phase noise issues.

Innovation Solution

A clock circuit using a delay line to generate a spread spectrum clock signal from a reference clock, where the delay line's delay is controlled by a modulation signal, providing a simplified and low-phase-noise solution without the need for a feedback signal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If spread spectrum clock signal is generated using conventional PLL circuit, then EMI spectral components are reduced, but circuit complexity increases and phase noise performance deteriorates

Engineering Contradiction:
ImproveEMI spectral componentsVSAvoidcircuit structure
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the feedback loop from the conventional PLL circuit, retaining only the essential components (phase detector, charge pump, VCO, and frequency divider) needed to generate spread spectrum clock signals. This removal of the feedback path simplifies the circuit while preserving the EMI reduction capability through frequency modulation.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent employs a simplified open-loop architecture that uses basic, readily available components rather than complex feedback control mechanisms. The circuit uses standard digital logic elements and a VCO that can be easily integrated, reducing both circuit complexity and manufacturing cost while achieving the desired spread spectrum functionality.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Object-generated harmful factors

If spread spectrum clock signal is generated using conventional PLL circuit, then EMI spectral components are reduced, but phase noise performance deteriorates

Engineering Contradiction:
ImproveEMI spectral componentsVSAvoidphase noise performance
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

By removing the feedback loop from the conventional PLL, the patent eliminates the source of phase noise that arises from feedback instability and component variations. The open-loop configuration ensures that phase noise is determined solely by the reference clock and VCO, without additional noise introduced by feedback path fluctuations.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies frequency modulation to the clock signal before it is distributed to the system, using a predetermined modulation pattern stored in lookup tables. This preliminary frequency variation spreads the spectral energy before any potential noise amplification could occur in a feedback system, thereby maintaining better phase noise characteristics.

Inventive Principle:
Principle #10Preliminary action

3Object-generated harmful factors

If conventional EMI suppression measures are implemented, then EMI emissions comply with regulatory limits, but manufacturing cost increases

Engineering Contradiction:
ImproveEMI emissions complianceVSAvoidmanufacturing cost
Core Design Contradiction:
Object-generated harmful factorsVSEase of manufacture

Solution Approach 1:

The patent converts the inherently periodic clock signal, which causes concentrated EMI emissions at fundamental and harmonic frequencies, into a spread spectrum signal by deliberately modulating its frequency. This transformation distributes the energy across a wider frequency range, naturally reducing peak emissions without requiring additional suppression hardware or shielding.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent changes the frequency parameter of the clock signal dynamically by applying frequency modulation with predetermined patterns. This parameter variation spreads the spectral energy distribution, reducing peak EMI emissions at any single frequency and enabling compliance with regulatory limits without additional cost-intensive measures.

Inventive Principle:
Principle #35Parameter changes

4Speed

If clock signal frequency is increased for high performance, then processing speed improves, but EMI emissions increase

Engineering Contradiction:
Improveprocessing speedVSAvoidEMI emissions
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent applies frequency modulation to high-speed clock signals, spreading their spectral energy across a wider range. This allows the system to operate at higher processing speeds while the spread spectrum technique ensures that peak EMI emissions remain within regulatory limits by distributing energy rather than concentrating it at harmonic frequencies.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent transforms the harmful concentrated EMI emissions that naturally occur with high-speed clocking into beneficial spread spectrum emissions. By deliberately modulating the frequency of high-speed clock signals, the system maintains processing performance while converting the EMI problem into a distributed spectral pattern that complies with regulations.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS7400696B2Spread spectrum clock generator and method of generating spread spectrum clock
Publication Date: 2008.07.15 ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
  • US7400696B2 patent drawing
  • US7400696B2 patent drawing
  • US7400696B2 patent drawing

AI summary

A clock circuit for generating a spread spectrum clock signal with reduced amplitude electromagnetic interference (EMI) spectral components is provided where the clock circuit includes a delay line circuit, the delay line circuit providing a spread spectrum clock signal from a reference clock signal in response to a modulation signal, a delay of said delay line circuit being controlled by said modulation signal.