Spread Spectrum Clock Circuit Modulation Efficiency
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Solution Overview
Problem
Conventional clock generation circuits face limitations in modulation efficiency due to waveform distortion and high jitter, especially at higher frequencies, which can lead to erroneous operation of ICs, and existing methods struggle to balance amplitude and period for optimal frequency modulation.
Innovation Solution
A spread spectrum type clock generation circuit with a phase-locked loop and clock modulation circuit that includes a voltage controlled oscillator, frequency divider, phase frequency comparator, and a ΔΣ modulator to generate a digital signal with controlled amplitude and period, distributing the peak of the modulation pattern to improve frequency modulation efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the amplitude of the modulation waveform is increased to improve frequency modulation efficiency, then the modulation efficiency improves, but the jitter of the output clock increases causing erroneous IC operation
Solution Approach 1:
The patent changes the waveform shape parameter from conventional triangular or sine waves to a specifically designed waveform with steeper slopes at peak portions and gentler slopes at intermediate points. This parameter change allows achieving high modulation efficiency without requiring large amplitude, thus avoiding excessive jitter that would cause IC operation errors.
Solution Approach 2:
The patent employs a dynamic modulation approach where the waveform characteristics are optimized to distribute peak values temporally. The modulation waveform is designed to have varying slope characteristics - steeper at peaks for efficient modulation and gentler at intermediate points to control jitter - creating a dynamic balance between modulation efficiency and signal stability.
2Device complexity
If a triangular waveform with constant slope is used for modulation, then the circuit complexity is reduced, but the frequency modulation efficiency deteriorates
Solution Approach 1:
The patent modifies the waveform parameter from a constant slope (triangular wave) to a variable slope waveform where the slope changes depending on the waveform position. This allows achieving high modulation efficiency by having steeper slopes at peak portions while maintaining reasonable circuit complexity through systematic waveform generation.
Solution Approach 2:
The patent introduces asymmetry in the waveform slopes - steeper slopes at peak portions and gentler slopes at intermediate points. This asymmetric waveform design optimizes frequency modulation efficiency by concentrating modulation action where needed while reducing unnecessary signal variations, achieving better performance than symmetric triangular waves without excessive circuit complexity.
3Ease of operation
If an analog circuit or digital-to-analog converter is used to generate modulation signal, then the modulation waveform can be generated, but waveform distortion occurs degrading frequency modulation efficiency
Solution Approach 1:
The patent replaces the analog circuit or digital-to-analog converter approach with a purely digital circuit implementation. The modulation waveform is generated using digital logic circuits including counters, adders, and multiplexers, which inherently provide high accuracy without the distortion problems associated with analog components and D/A conversion processes.
Solution Approach 2:
The patent uses simple digital logic components (counters, adders, multiplexers) that are inexpensive and reliable compared to analog circuits or D/A converters. These digital components generate the modulation waveform directly in digital form, eliminating the need for analog signal conversion and avoiding waveform distortion entirely.
Data Source
AI summary
The present invention provides a spread spectrum type clock generation circuit whose EMI for peripheral equipment is reduced. The clock generation circuit comprises a phase-locked loop circuit and a clock modulation circuit. The clock modulation circuit comprises a ΔΣ modulator, to frequency-modulate an output clock by modulating the frequency division number of a frequency divider in the phase-locked loop circuit by a digital circuit, and further comprises a modulation pattern controller for distributing the peak of a triangular waveform which is a modulation waveform generated by a modulation pattern generator to change the amplitude and the period thereof, thereby making it possible to eliminate dullness and distortion of a modulation waveform in a modulating method using a conventional analog circuit and to obtain an output clock having higher modulation efficiency than that in a case where a normal triangular waveform is employed in a conventional modulating method using a digital circuit.