Square Root Computation via Multiplier Logic
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Solution Overview
Problem
Existing methods for performing square root operations in computer systems, such as iterative converging approximation techniques like the Newton-Raphson method, often require division computations that are complex and power-consuming, particularly in devices with limited processing resources like mobile devices, where latency and power efficiency are critical.
Innovation Solution
Implementing an iterative converging approximation technique using multiplier logic to determine the square root of an input value by performing specific multiplication and subtraction operations, avoiding division and reducing the number of computations in the final iteration to minimize latency and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If iterative converging approximation techniques like Newton-Raphson are used to compute square root, then convergence speed and accuracy are improved, but division computations increase device complexity and power consumption
Solution Approach 1:
The patent transforms the square root computation problem by changing the mathematical parameters and equations used. Instead of directly computing square root with division operations, it uses alternative mathematical formulations that can be solved through multiplication and addition only, thereby maintaining accuracy while eliminating complex division computations
Solution Approach 2:
The patent substitutes the mechanical division operation with multiplication-based computations. By reformulating the iterative convergence method to use only multiplication, addition, and subtraction operations, it replaces the complex division mechanism with simpler arithmetic operations that are more efficient in hardware implementation
2Measurement precision
If iterative converging approximation techniques are used to compute square root, then computation accuracy is improved, but power consumption increases in resource-limited devices
Solution Approach 1:
The patent changes the computational parameters by selecting mathematical operations that are more energy-efficient. It reformulates the iterative method to use multiplication and addition instead of division, which reduces the computational burden and power consumption while maintaining the desired accuracy in square root computation
Solution Approach 2:
The patent substitutes power-intensive division operations with less energy-consuming multiplication and addition operations. This substitution reduces the overall power consumption of the iterative convergence process while preserving computational accuracy, making it suitable for resource-limited mobile devices
3Measurement precision
If traditional iterative methods with division are used, then mathematical accuracy is maintained, but latency increases due to more computations
Solution Approach 1:
The patent changes the computational parameters by reformulating the iterative equations to eliminate division operations. This reformulation reduces the number of computational steps required in each iteration while maintaining mathematical accuracy, thereby reducing overall computation latency
Solution Approach 2:
The patent substitutes division-based iterative computations with multiplication-based computations. Since multiplication operations are generally faster and can be parallelized more effectively than division, this substitution reduces computation latency while maintaining the accuracy of the square root result
Data Source
AI summary
A method and computer system are provided for implementing a square root operation using an iterative converging approximation technique. The method includes fewer computations than conventional methods, and only includes computations which are simple to implement in hardware on a computer system, such as multiplication, addition, subtraction and shifting. Therefore, the methods described herein are adapted specifically for being performed on a computer system, e.g. in hardware, and allow the computer system to perform a square root operation with low latency and with low power consumption.