SQUID ADC Clock Frequency Separation to Reduce Measurement Noise
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Solution Overview
Problem
The existing signal processing systems face challenges in reducing noise generated by digital clock signals during analog to digital conversion in SQUID sensors, leading to decreased performance and inaccurate magnetic field measurements due to clock signal overlap and phase differences.
Innovation Solution
A signal processing apparatus that sets different reference clock frequencies for each analog to digital converter (ADC) beyond the frequency range available to the SQUID sensors, minimizing noise and preventing errors in magnetic field measurements by using local oscillators and a controller to generate clock signals with specific frequency intervals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a common digital clock frequency is used for all ADCs, then the device complexity is reduced, but noise increases due to clock signal overlap and phase differences
Solution Approach 1:
Each ADC is assigned a unique reference clock frequency instead of using a common frequency. This local differentiation of clock frequencies eliminates the clock signal overlap and phase difference issues that cause digital signal noise, while maintaining relatively simple device complexity through the use of local oscillators for each channel.
2Productivity
If the reference clock frequency is set within the SQUID sensor's frequency range, then the ADC operation is optimized, but measurement precision decreases due to noise interference
Solution Approach 1:
The reference clock frequency is shifted from the time domain (frequency range) to another dimension by setting it beyond the SQUID sensor's frequency range (above 200 Hz). This dimensional shift allows the clock signal to operate at frequencies that do not interfere with the magnetic field measurement band, thereby maintaining both ADC operation efficiency and measurement precision.
3Device complexity
If multiple ADCs operate with the same clock frequency, then the system structure is simplified, but reliability decreases due to beating and phase differences
Solution Approach 1:
The system assigns different reference clock frequency parameters to each ADC channel. By changing the frequency parameter rather than the structural configuration, the patent maintains a relatively simple system structure while significantly improving signal processing stability and reliability by eliminating beating and phase difference issues.
Data Source
AI summary
Provided is signal processing device including superconducting quantum interference device (SQUID) sensors configured to sense a signal for each of a plurality of channels, analog to digital converters (ADC) configured to convert analog signals input to a predetermined number of channels from the SQUID sensors into digital signals by using a clock signal, local oscillators corresponding to the ADCs, respectively and configured to generate the clock signal having a reference clock frequency for an operation of a corresponding ADC, and a controller configured to the local oscillators to enable the reference clock frequency to have a frequency beyond a frequency range available to the SQUID sensor.