Multi-Core Processor Virtualization via SR-IOV Segmentation

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Solution Overview

Problem

Existing virtualization technologies face issues such as low computation efficiency, Head-of-line (HOL) blocking, high adjacent noise, and difficulty in extending, particularly in multi-core processor environments where resource management and isolation are challenging.

Innovation Solution

A virtualization method and system based on a multi-core processor that divides processing cores into virtualization functions, each corresponding to one or multiple cores, and maps these functions to containers, utilizing Single Root I/O Virtualization (SR-IOV) technology to enable independent operation and resource sharing without HOL blocking or context switch overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If time slicing technology is used for virtualization, then multiple virtual machines can share a computing engine, but computation efficiency decreases and time latency increases

Engineering Contradiction:
Improveresource sharing capabilityVSAvoidcomputation efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The computing engine is segmented into multiple independent processing cores, where each virtual machine can be assigned to specific core(s). This eliminates the need for time slicing by providing dedicated processing resources to each virtual machine, thereby maintaining resource sharing capability while eliminating computation efficiency loss and time latency associated with context switching.

Inventive Principle:
Principle #1Segmentation

2Productivity

If a public computing engine is shared by multiple virtual machines, then resource utilization improves, but reliability decreases due to HOL blocking and adjacent noise

Engineering Contradiction:
Improveresource utilizationVSAvoidsystem stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The computing engine is divided into multiple independent processing cores that can be selectively allocated to virtual machines. This segmentation provides isolation between virtual machines, preventing HOL blocking and adjacent noise from affecting other VMs, while maintaining high resource utilization through flexible core allocation and sharing mechanisms.

Inventive Principle:
Principle #1Segmentation

3Device complexity

If virtual machines share a computing engine, then device complexity is reduced, but ease of operation worsens due to context switch overhead

Engineering Contradiction:
Improvevirtualization system structureVSAvoidcontext switch overhead
Core Design Contradiction:
Device complexityVSEase of operation

Solution Approach 1:

The computing engine is segmented into multiple independent processing cores, eliminating the need for context switching between virtual machines. Each virtual machine can run on dedicated core(s) simultaneously, removing context switch overhead and associated performance penalties while maintaining a relatively simple virtualization system structure through direct core-to-VM mapping.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20230111884A1Virtualization method, device, board card and computer-readable storage medium
Publication Date: 2023.04.13 ANHUI CAMBRICON INFORMATION TECH CO LTD
  • US20230111884A1 patent drawing
  • US20230111884A1 patent drawing
  • US20230111884A1 patent drawing

AI summary

The present disclosure provides a virtualization method, a system, an electrical device and a computation apparatus based on a multi-core processor. The computation apparatus is included in a combined processing apparatus, which also includes a general interconnection interface and other processing apparatuses. The computation apparatus interacts with other processing apparatuses to jointly complete computation operations specified by the user. The combined processing apparatus also includes a storage apparatus, which is respectively connected to the computation apparatus and other processing apparatuses and is used for storing data of the computation apparatus and other processing apparatuses.