SRAM Bit Line Droop Circuit for Read Stability
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Solution Overview
Problem
Static random access memory (SRAM) cell stability is compromised due to doping variations and Field Effect Transistor (FET) threshold voltage mismatches in newer technologies, which existing solutions attempt to address by introducing a separate voltage supply, but this increases costs and complexity.
Innovation Solution
Reducing bit line voltages in SRAM cells to a reference voltage prior to activating the word line during a read operation, rather than requiring a separate supply voltage higher than the chip supply, thereby improving stability without the need for additional power infrastructure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a separate voltage supply VCS higher than chip supply VDD is used to improve read performance, then read performance is improved, but device complexity and cost increase
Solution Approach 1:
The patent changes the voltage parameter of the bit line from the standard VDD level to a reduced voltage level (VDD - Vdroop) before the read operation. This parameter change allows the SRAM cell to achieve the necessary voltage differential for stable read operation without requiring a separate higher voltage supply, thereby improving read performance while avoiding increased device complexity
Solution Approach 2:
Instead of raising the bit line voltage above VDD (the conventional approach), the patent inverts the approach by lowering the bit line voltage below VDD before the read operation. This inversion creates a voltage differential that improves read stability without requiring a separate higher voltage supply, thus resolving the contradiction between read performance and device complexity
2Reliability
If a separate voltage supply VCS is used to improve SRAM cell stability, then SRAM cell stability is improved, but manufacturing cost increases
Solution Approach 1:
The patent modifies the voltage parameter of the bit line by reducing it to VDD - Vdroop before the read operation. This parameter change creates a favorable voltage differential that enhances SRAM cell stability during read operations, eliminating the need for a separate higher voltage supply and thereby reducing manufacturing costs
Solution Approach 2:
The patent uses the existing VDD supply voltage in conjunction with a droop circuit to generate the required voltage differential for stable read operation. The system serves itself by utilizing the standard power supply infrastructure rather than requiring external higher voltage supplies, thus improving SRAM cell stability without increasing manufacturing cost
3Productivity
If a separate power regulator and interconnects are added to provide VCS, then read performance is improved, but device complexity and cost increase
Solution Approach 1:
The patent extracts the essential requirement for improved read performance (voltage differential) from the complex solution of a separate higher voltage supply system. By removing the need for external power regulators and interconnects, the patent achieves read performance improvement through a simpler on-chip voltage droop mechanism
Solution Approach 2:
The patent merges the voltage regulation function into the existing bit line precharge circuitry by adding a droop circuit that works with the standard VDD supply. This consolidation eliminates the need for separate power infrastructure while achieving the voltage differential necessary for improved read performance
Data Source
AI summary
A static random access memory (SRAM) includes an SRAM cell to store a bit of data. A word line accesses the SRAM cell, which, responsively, during a read, drives either a bit line true (BLT) or a bit line complement (BLC) low. Both BLT and BLC are precharged to a supply voltage, then, subsequently are discharged to a reference voltage, lower than the supply voltage, prior to the word line being activated. Because the bit lines are at a voltage lower than the supply voltage when the SRAM cell is activated, the SRAM cell stability is improved.