SRAM Body Bias Control Circuit for Temperature-Dependent Margin Stability
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Solution Overview
Problem
Conventional read and write assist circuits for SRAM cells face challenges in maintaining an adequate static noise margin (SNM) and write margin simultaneously, as these requirements are conflicting and temperature-dependent, leading to degradation in performance and increased power consumption.
Innovation Solution
A semiconductor memory circuit with a bias control circuit that generates a temperature-dependent bias voltage based on junction leakages at the body terminals of transistors, which is used to control threshold voltages and regulate the SNM and write margin, utilizing a transistor-based diode to minimize area and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read assist technique is used to maintain adequate SNM by decreasing drive strengths of pass-gate transistors, then SNM is improved, but read current degrades and operational speed decreases
Solution Approach 1:
The patent applies body biasing to dynamically adjust the threshold voltage of pass-gate transistors based on temperature conditions. At high temperatures, a higher body bias voltage is applied to increase the threshold voltage and maintain SNM. At low temperatures, the body bias voltage is reduced to maintain faster read current and operational speed. This dynamic adjustment resolves the contradiction between maintaining SNM and preserving operational speed across different temperature ranges.
2Reliability
If write assist technique is used to maintain adequate write margin by increasing drive strengths of pass-gate transistors, then write margin is improved, but power consumption increases
Solution Approach 1:
The patent uses temperature-dependent body biasing to dynamically control the threshold voltage of pass-gate transistors for write operations. At low temperatures, a higher body bias voltage is applied to increase the threshold voltage and improve write margin. At high temperatures, the body bias voltage is reduced to minimize additional power consumption while maintaining adequate write margin. This dynamic approach resolves the contradiction between maintaining write margin and minimizing power consumption.
3Reliability
If conventional biasing circuits are used to provide bias voltage to body terminals, then threshold voltage control is achieved, but additional area and power consumption increase
Solution Approach 1:
The patent employs a self-biasing mechanism where the bias voltage for the body terminals is generated automatically based on the temperature-dependent behavior of the circuit components themselves. The body bias voltage is derived from the voltage drops across resistors that are part of the existing circuit operation, eliminating the need for separate bias generation circuits. This self-service approach provides effective threshold voltage control while minimizing additional area and power consumption.
4Reliability
If temperature increases, then SNM degrades, but write margin improves
Solution Approach 1:
The patent implements temperature-dependent body biasing that automatically adjusts the threshold voltage of pass-gate transistors based on temperature conditions. At high temperatures where SNM degrades, a higher body bias voltage is applied to increase the threshold voltage and restore SNM. At low temperatures where write margin degrades, the body bias voltage is reduced to maintain adequate write margin. This dynamic temperature compensation resolves the contradiction between maintaining SNM and write margin across different temperature ranges.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution maintains SNM and write margin above acceptable levels over a temperature range, enhances operational speed, and reduces power consumption, while ensuring reliable read and write operations without degrading one margin at the expense of the other.
Implementation Method 1
The bias voltage, which is temperature dependent, is generated based on junction leakages at the body terminals
Data Source
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AI summary
A semiconductor memory circuit includes a SRAM cell and a bias control circuit for biasing the SRAM cell. The SRAM cell includes pull-up, pull-down, and pass-gate transistors. The bias control circuit is connected to body terminals of the pull-down and pass-gate transistors for providing a bias voltage. The bias control circuit controls threshold voltages of the pull-down and pass-gate transistors by way of the bias voltage. The bias voltage, which is temperature dependent, is generated based on junction leakages at the body terminals of the pull-down and pass-gate transistors. The use of a temperature-dependent bias voltage to bias the body terminals of the pull-down and pass-gate transistors ensures that the write margin and the static noise margin (SNM) of the SRAM cell are relatively constant and above acceptable levels over a defined temperature range.