SRAM Cell Layout Using Variable Fin Height for Stability
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Solution Overview
Problem
In multi-gate field effect transistor (MuGFET) technologies, the fixed fin pitch and shared fin height in SRAM cell layouts result in sub-optimal electrical characteristics, limiting cell stability and area efficiency, especially during read and write operations.
Innovation Solution
The SRAM cell layout is optimized by varying fin geometry, such as height and doping, to differentiate the current driving characteristics of devices, allowing for stronger pull-down devices and separate performance levels in different areas, which can be achieved by using a substrate with insulating layers and varying fin processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If fins are placed close together with fixed pitch in MuGFET layouts, then area efficiency is improved, but electrical characteristics become sub-optimal and cell stability deteriorates
Solution Approach 1:
The patent applies local quality by creating distinct fin regions with different characteristics: a first region with fins of first height for access transistors and a second region with fins of second height for pull-down transistors. This allows each transistor type to have optimized electrical characteristics while maintaining close fin spacing for area efficiency.
Solution Approach 2:
The fin structure is segmented into multiple regions with different fin heights. The first fin region and second fin region are separately configured to provide different current driving capabilities, enabling the access transistors and pull-down transistors to have different performance levels within the same compact cell area.
2Device complexity
If all transistors share the same fin height, then layout simplicity is improved, but current driving characteristics become non-optimal and read/write stability deteriorates
Solution Approach 1:
Different fin heights are assigned to different transistor regions: access transistors use fins of one height while pull-down transistors use fins of another height. This local differentiation optimizes current driving characteristics for each transistor type, improving read and write stability without significantly complicating the overall layout.
3Reliability
If access transistor is made weaker with smaller width, then read stability is improved, but write capability deteriorates
Solution Approach 1:
The patent uses different fin heights to differentiate between access transistors and pull-down transistors. The access transistors in the first fin region have optimized current driving capability through their fin height, while pull-down transistors in the second fin region have different fin heights that provide stronger pull-down strength. This resolves the contradiction by using vertical dimension (fin height) rather than horizontal dimension (transistor width) to achieve the required strength differentiation.
Data Source
AI summary
A circuit includes a plurality of first MuGFET devices supported by a substrate and having a first performance level. A plurality of second MuGFET devices is supported by the substrate and have a second performance level. The first and second devices in one embodiment are arranged in separate areas that facilitate different processing of the first and second devices to tailor their performance characteristics. In one embodiment, the circuit is an SRAM having pull down transistors with higher performance.