SRAM Cell Transistor Layout to Mitigate NBTI Aging
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Solution Overview
Problem
Existing two-port SRAM circuits suffer from Negative Bias Temperature Instability (NBTI) effect, leading to increased threshold voltage of p-type transistors, which results in lower conduction current and worsened static noise margin.
Innovation Solution
Implementing memory cells with n-type transistors as read pass-gate transistors and p-type transistors as write pass-gate transistors, reducing dependence on aging and mitigating the NBTI effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If p-type transistors are used as read pass-gate transistors in two-port SRAM circuits, then the circuit can achieve initial functionality, but the threshold voltage increases due to NBTI effect during aging, leading to lower conduction current and worsened static noise margin
Solution Approach 1:
The patent changes the key parameter of transistor type from p-type to n-type for the read pass-gate transistor. This parameter change fundamentally alters the device's response to aging effects, as n-type transistors do not suffer from NBTI degradation, thereby maintaining stable threshold voltage and conduction current over time while preserving the required read functionality
Solution Approach 2:
The patent inverts the conventional assignment of transistor types in SRAM circuits. Instead of using p-type transistors for read operations (conventional approach), it uses n-type transistors for read pass-gate functions. This inversion resolves the aging-related degradation issue while maintaining circuit functionality through complementary device characteristics
2Ease of manufacture
If p-type transistors are used in SRAM circuits, then the circuit design follows conventional approaches, but the conduction current decreases over time due to threshold voltage increase from NBTI effect
Solution Approach 1:
The patent changes the transistor type parameter from p-type to n-type for specific functions within the SRAM circuit. This parameter change maintains compatibility with conventional manufacturing processes while fundamentally improving the stability of conduction current by eliminating NBTI-induced threshold voltage shifts that plague p-type transistors
3Reliability
If n-type transistors are used as read pass-gate transistors, then the static noise margin remains stable over time, but the device complexity increases due to mixed transistor type implementation
Solution Approach 1:
The patent applies local quality by using different transistor types in different locations within the SRAM circuit based on functional requirements. Specifically, n-type transistors are used for read pass-gate functions where aging resistance is critical, while p-type transistors are used for write pass-gate functions where they traditionally excel. This localized differentiation optimizes overall circuit reliability without requiring complete redesign of the entire circuit
Data Source
AI summary
A memory device includes a storage element formed of a first inverter and a second inverter cross-coupled to each other, a first transistor having a first conductive type, and connected between a first bit line and a first storage node of the storage element; a second transistor having the first conductive type, and connected between a second bit line and a second storage node of the storage element; and a third transistor having a second conductive type opposite to the first conductive type, and connected between the first storage node and a third bit line.