SRAM Cell Power Supply Disconnection for Stability

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Solution Overview

Problem

SRAM cells face challenges in maintaining stability during read operations and writability due to the trade-off between read disturbances and write failures, which is exacerbated by the complexity of their structure, leading to increased area requirements for storing data.

Innovation Solution

The method involves disconnecting the high voltage (VDDA) and low voltage (VSS) power supply terminals from SRAM cells during write operations using P-channel and N-channel transistors, respectively, allowing for simultaneous writing across all cells on an activated word line while keeping others in standby mode, thereby optimizing stability and reducing area requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the structure of SRAM cells is made more complex to improve stability during read operations, then read disturbance resistance is improved, but device area increases

Engineering Contradiction:
Improvestability during read operationsVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The patent applies dynamics by making the power supply connection dynamic rather than static. The first and second power supply terminals are selectively connected to first and second power supplies based on operational mode (read or write). This dynamic reconfiguration allows the cell to achieve high stability during read operations without permanently increasing structural complexity or area.

Inventive Principle:
Principle #15Dynamics

2Reliability

If the structure of SRAM cells is made more complex to improve write capability, then writability is improved, but device area increases

Engineering Contradiction:
ImprovewritabilityVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The patent uses dynamic power supply switching to improve writability without adding permanent structural complexity. During write operations, the first power supply terminal is connected to the first power supply and the second power supply terminal is connected to the second power supply, enabling effective writing. This dynamic connection allows enhanced write capability while maintaining compact cell structure.

Inventive Principle:
Principle #15Dynamics

3Productivity

If power supply terminals are always connected to power supplies, then continuous operation is enabled, but energy consumption increases

Engineering Contradiction:
Improvecontinuous operationVSAvoidenergy consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action by selectively connecting power supply terminals to power supplies based on operational requirements. The control circuit activates specific power supply connections only when needed for read or write operations, rather than maintaining continuous connections. This periodic activation enables continuous device operation while significantly reducing energy consumption during idle or standby periods.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS8817528B2Device comprising a plurality of static random access memory cells and method of operation thereof
Publication Date: 2014.08.26 GLOBALFOUNDRIES US INC
  • US8817528B2 patent drawing
  • US8817528B2 patent drawing
  • US8817528B2 patent drawing

AI summary

A method comprises writing data to one or more static random access memory (SRAM) cells. Writing data to the one or more SRAM cells comprises applying a first data signal to at least one bit line electrically connected to the one or more SRAM memory cells, electrically disconnecting at least one of a first power supply terminal and a second power supply terminal of each of the one or more SRAM cells from a power supply and applying a word line signal to a word line electrically connected to the one or more SRAM cells. Thereafter, the at least one of the first power supply terminal and the second power supply terminal of each of the one or more SRAM cells is electrically connected to the power source.