SRAM Cell with Tuned FinFET Thresholds for Low Voltage Stability
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Solution Overview
Problem
SRAM devices formed by FinFETs face challenges in reducing power consumption and increasing speed due to limited threshold voltage tuning range and potential degradation in leakage and mismatch performance, especially in low voltage operations.
Innovation Solution
The design incorporates two-port and single-port SRAM cells with FinFETs having different threshold voltages, utilizing a write-assist circuitry and tuning gate dielectric and work function layers to achieve stable operation at lower voltages, and balancing threshold voltages for improved performance and power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If the operation voltage of SRAM devices is reduced to save power, then power consumption is reduced, but SRAM cell stability deteriorates
Solution Approach 1:
The patent applies different threshold voltage characteristics to different transistors within the SRAM cell. Specifically, pull-down transistors are designed with higher threshold voltages while pass-gate transistors use lower threshold voltages. This local differentiation allows the cell to maintain stability at reduced operating voltages by compensating for voltage drops in specific regions without requiring heavy doping across all transistors.
Solution Approach 2:
The patent changes the threshold voltage parameter of transistors through selective doping strategies. By controlling dopant concentration and type in specific transistor regions, the design achieves optimized threshold voltages that enable stable operation at ultra-low supply voltages while maintaining adequate noise margins and writeability.
2Reliability
If heavy doping is applied to achieve higher threshold voltages, then threshold voltage is increased, but leakage increases and mismatch performance deteriorates
Solution Approach 1:
Instead of uniformly doping all transistors heavily, the patent applies selective doping only to specific transistors that require higher threshold voltages (pull-down transistors). The pass-gate transistors are kept lightly doped or undoped, maintaining low leakage characteristics. This localized approach achieves the necessary threshold voltage differentiation without the penalty of increased leakage and mismatch across the entire cell.
3Speed
If FinFET channel region is made thinner to improve speed, then channel control is improved, but threshold voltage tuning range is limited
Solution Approach 1:
The patent compensates for the limited threshold voltage tuning range inherent in thin-channel FinFETs by using selective doping strategies. By introducing controlled doping in specific transistor regions, the design extends the effective threshold voltage tuning range beyond what geometry alone can achieve, while preserving the speed advantages of thin channels.
Data Source
AI summary
An integrated circuit includes first and second SRAM cells. The first SRAM cell includes first and second pull-up devices, first and second pull-down devices configured with the first and second pull-up devices to form first and second cross-coupled inverters, first and second pass-gate devices configured with the first and second cross-coupled inverters for writing data, a read pull-down device coupled to the first inverter, and a read pass-gate device coupled to the read pull-down device. The second SRAM cell includes third and fourth pull-up devices, and third and fourth pull-down devices configured with the third and fourth pull-up devices to form third and fourth cross-coupled inverters. Work function layers of gates of the first pull-up device, first pull-down device, and third pull-up device have a first work function, a second work function, and a third work function respectively. The first, second, and third work functions are different from each other.