SRAM FinFET Cutting Layer Formation via Dual Mask Segmentation
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Solution Overview
Problem
Existing SRAM memory performance is hindered by the difficulty in forming reliable transmission gate structures due to the small distance between cutting layers, leading to positional deviations and poor growth morphology of source-drain layers, which complicates the process and reduces reliability.
Innovation Solution
A method involving the formation of a mask layer with specific openings to create distinct cutting layers, allowing for the formation of transmission and pull gate structures from initial gate structures, and subsequent blocking of second fins to improve the SRAM memory performance by simplifying process steps and enhancing structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single mask layer with multiple openings is used to form both cutting layers, then the number of process steps is reduced, but the manufacturing precision deteriorates due to positional deviations
Solution Approach 1:
The patent divides the formation process into two separate mask layers (first mask layer and second mask layer) that are formed at different stages. The first mask layer defines the first cutting layer position, while the second mask layer defines the second cutting layer position. This segmentation allows each mask to be precisely positioned and formed independently, ensuring high manufacturing precision for both cutting layers while maintaining a reasonable number of process steps through the use of shared initial gate structures and fins.
2Area of stationary object
If the distance between cutting layers is reduced to increase integration, then the device complexity increases due to poor growth morphology of source-drain layers
Solution Approach 1:
The patent forms the first and second fins in advance before forming the gate structures. These fins serve as pre-positioned structures that guide the subsequent formation of source-drain layers. By having the fins already in place with proper spacing, the source-drain layers can grow directly on the fins with good morphology even when the cutting layers are closely spaced, thus reducing device complexity while enabling high integration.
3Ease of manufacture
If redundant process steps are removed to simplify manufacturing, then the reliability of transmission gate structures may deteriorate
Solution Approach 1:
The patent designs the initial gate structures to serve multiple functions: they act as templates for both the first and second cutting layers, and they provide the foundation for forming both transmission gate structures and pull-up/pull-down gate structures. The first and second fins also serve dual purposes as both structural elements and as growth templates for source-drain layers. This multi-functionality allows redundant steps to be removed while maintaining reliability through the preserved critical formation steps.
Data Source
AI summary
Static random access memory (SRAM) and its forming method are provided. The forming method includes: providing a semiconductor substrate including memory cell regions, each memory cell region including a transmission region, a pull-down region and a pull-up region including a pull-up fin cutting region; forming first fins on the transmission region and the pull-down region; forming second initial fins on the pull-up region; forming initial gate structures across the first fins and the second initial fins; forming a dielectric layer on the semiconductor substrate, the first fins and the second initial fins; forming a mask layer on the dielectric layer and the initial gate structures; forming a first cutting layer in the initial gate structures at a bottom of the mask opening; and forming a second cutting layer on the pull-up fin cutting region in the dielectric layer at the bottom of the mask opening and in the second initial fins.