SRAM-DRAM Display Refresh for Power Savings
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Solution Overview
Problem
Current wireless communications devices face challenges in providing efficient filtering during the frequency translation process while maintaining low power consumption, small size, and high data-rate capabilities.
Innovation Solution
The implementation of a low-power display refresh method that copies frame buffer data from DRAM memory to SRAM memory, allowing the DRAM to enter a self-refresh mode and reducing system power consumption by using the SRAM to drive displays, thereby minimizing the need for active graphics processing during static image display.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the display is refreshed using DRAM memory, then the display can be driven with full functionality, but the power consumption increases significantly
Solution Approach 1:
The memory system is segmented into two types: DRAM for full functionality and SRAM for low-power operation. The display refresh process is segmented into two modes: full refresh using DRAM and self-refresh using SRAM. This segmentation allows the system to choose the appropriate memory type based on power consumption requirements while maintaining display functionality.
Solution Approach 2:
The patent implements a self-refresh mechanism where SRAM memory copies the display buffer contents and maintains them without requiring continuous external refresh signals. This copying approach allows the display to be refreshed using low-power SRAM memory instead of high-power DRAM memory, significantly reducing power consumption while maintaining display reliability.
2Use of energy by moving object
If the system enters sleep mode to reduce power consumption, then power saving is achieved, but the display cannot be refreshed
Solution Approach 1:
The SRAM memory provides a self-refresh capability that allows the display to be refreshed without requiring external processor intervention or high-power DRAM memory. The self-refresh mechanism automatically maintains display contents using low-power SRAM, enabling the system to operate in sleep mode while still maintaining display functionality.
Solution Approach 2:
The system changes the memory refresh parameter from using high-power DRAM to low-power SRAM during sleep mode operation. This parameter change allows the display refresh operation to continue with significantly reduced power consumption, resolving the contradiction between power saving and display refresh capability.
3Reliability
If high-power DRAM memory is used for display refresh, then full display functionality is maintained, but the device size and cost increase
Solution Approach 1:
The memory system is divided into two segments: DRAM for high-performance display operation and SRAM for low-power self-refresh operation. This segmentation allows the system to use the appropriate memory type for each function, avoiding the need for a single complex high-performance memory system while maintaining full display functionality when needed.
Solution Approach 2:
The SRAM memory serves multiple functions: it acts as the primary display buffer during normal operation and provides self-refresh capability during sleep mode. This multi-functionality reduces the need for separate dedicated memory components, simplifying the overall device architecture while maintaining display reliability.
Data Source
AI summary
An application processor coupled to a Static Random Access Memory (SRAM) interfaces with a graphics accelerator. A Dynamic Random Access Memory (DRAM) stores frame buffer data that may be transferred to a display through a switch located on the graphics accelerator in normal operation. In a power savings mode, the DRAM may be powered down and a copied frame buffer data stored in the SRAM may be transferred to the display through the switch.