SRAM-DRAM Memory Array for High-Speed Histogram Creation
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Solution Overview
Problem
Current methods for creating histograms in computing systems are inefficient, as they require significant resources and prolong computing time due to the need for extensive data processing by the host and DRAM device to determine and update data category counters.
Innovation Solution
A combination of SRAM and PIM capable DRAM devices, where SRAM devices are used for efficient data categorization and indicator storage, and DRAM devices perform column-oriented storage and updates of counters, reducing the need for external data transfer and enhancing processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data processing is performed by host and DRAM device to determine and update data category counters, then histogram creation can be completed, but computing time is prolonged and processing efficiency is reduced
Solution Approach 1:
The patent divides the histogram creation process into distinct segments: data categorization is performed by SRAM devices while counter updates are performed by DRAM devices. This segmentation allows parallel processing of different aspects of histogram creation, thereby reducing overall computing time and improving productivity without requiring the host to handle every detail of the process
Solution Approach 2:
The patent introduces SRAM devices as intermediary components between the host and DRAM devices. These SRAM devices efficiently categorize incoming data and generate indicators that trigger counter updates in DRAM devices, acting as a mediator that reduces the processing burden on both the host and DRAM devices while accelerating histogram creation
2Measurement precision
If extensive data processing is performed to determine data category counters, then accurate histograms can be created, but processing resources are significantly consumed
Solution Approach 1:
The patent implements partial action by having SRAM devices perform only data categorization and indicator generation, while DRAM devices perform only counter updates. This division means each component performs a subset of the total processing required for histogram creation, reducing the processing resource burden on any single device while maintaining overall histogram accuracy through the coordinated action of multiple devices
Data Source
AI summary
The present disclosure includes apparatuses and methods to change data category values. An example is a memory device that includes an array having a plurality of sequences of memory cells, where each of the respective sequences of memory cells includes a plurality of designated subsets of memory cells, and the array includes a counter corresponding to one of the plurality of designated subsets of memory cells. The memory device is configured to receive input corresponding to a data batch, where the input includes a designation that corresponds to the one of the plurality of designated subsets of memory cells to be conditionally updated, and to change a numerical value stored by the counter corresponding to the one of the plurality of designated subsets of memory cells.